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03DSYE(5V)STN黄绿黄绿侧背光5.0V5.0V焊盘插针2.7.1原理框图图2.14SG12864SYD-03DSYE原理框图2.7.2LCD应用时序2.7.2.1并行方式AC特性及时序表2.24并行方式AC特性(由MPU写资料到ST7920)TA=25℃，VDD=4.5VCharacteristicSymbolMinTypMaxUnitEnablecycletime(PinE)TC1200------nsEnablepulsewidth(PinE)TPW140------nsEnablerise/falltime(PinE)TR，TF------25nsAddresssetuptime(PinsRS，RW，E)TAS10------nsAddressholdtime(PinsRS，RW，E)TAH20------nsDatasetuptime(PinsDB0-DB7)TDSW40------nsDataholdtime(PinsDB0-DB7)TH20------ns正弦信号发生器-7-表2.25并行方式AC特性(由ST7920读资料到MPU)TA=25℃，VDD=4.5VCharacteristicSymbolMinTypMaxUnitEnablecycletime(PinE)TC1200------nsEnablepulsewidth(PinE)TPW140------nsEnablerise/falltime(PinE)TR，TF------25nsAddresssetuptime(PinsRS，RW，E)TAS10------nsAddressholdtime(PinsRS，RW，E)TAH20------nsDatadelaytime(PinsDB0-DB7)TDDR------100nsDataholdtime(PinsDB0-DB7)TH20------ns图2.15由MPU写资料到ST7920时序图图2.16由ST7920读资料到MPU时序图2.7.2.2并行方式AC特性及时序沈阳工程学院毕业设计（论文...
&&&&&&&&正弦信号发生器-I-便携式正弦信号发生器毕业设计摘要····························································································错误！未定义书签。&&&&&&&&ABSTRACT················································································错误！未定义书签。&&&&&&&&1绪论··························································································································1&&&&&&&&1.1课题背景·················································································································································11.2系统结构·················································································································································12硬件电路设计············································································································22.1系统设计方案······································································································································22.2方案论证·················································································································································22.3正弦信号发生器的基本原理······································································································32.4AT89S52的简介·································································································································32.4.1CPU系统······································································································52.4.2存储器系统··································································································52.4.3I/O口和其它功能单元················································································52.4.4AT89S52的时钟电路的接法······································································52.4.5时钟信号······································································································62.4.6AT89S52的各个管脚的功能介绍······························································62.4.7AT89S52的复位··························································································72.4.7.1复位电路·······························································································72.4.7.2开机复位后的状态···············································································82.4.8AT89S52的程序存储器配置······································································82.4.9AT89S52的数据存储器配置······································································92.4.10AT89S52的中断简介················································································92.4.10.1中断的定义：···················································································102.4.10.2中断允许控制···················································································112.4.10.3中断优先级控制···············································································122.4.11AT89S52定时/计数器简介·····································································142.4.1&&&&&&&&1.1T0和T1工作方式的控制································································152.4.11.2T0和T1工作状态的控制································································152.4.11.3T0和T1定时计数器的工作方式····················································162.4.11.4T2定时/计数器的控制·····································································172.4.11.5T2定时/计数器模式的控制·····························································182.4.11.6T2的工作方式··················································································182.4.12AT89S52的串行口的简介······································································202.4.12.1AT89S52串行口的结构···································································20沈阳工程学院毕业设计（论文）-II-2.4.12.2AT89S52串行口的控制···································································202.4.12.3AT89S52串行口的工作方式···························································222.4.13低功耗节电模式······················································································232.4.13.1电源断电标志···················································································232.4.13.2空闲模式···························································································232.4.13.3掉电模式···························································································232.4.14看门定时器WDT···················································································242.4.14.1WDT的使用·····················································································242.4.14.2掉电模式下的WDT········································································242.4.14.3空闲模式下的WDT········································································252.4.15其它特殊功能寄存器··············································································252.4.15.1辅助寄存器AUXR··········································································252.4.15.2辅助寄存器AUXR1········································································252.4.15.3双数据指针寄存器···········································································252.5AD9850简介·······································································································································262.5.1AD9850的控制字与控制时序··································································272.5.2I/O方式并行接口························································································22.5.3总线方式并行接口······················································································22.68279接口芯片······································································································································22.6.18279的结构··································································································22.6.28279的引脚定义··························································································32.6.38279的操作命令··························································································42.6.48279的状态字······························································································52.7LCD简介················································································································································62.7.1原理框图······································································································62.7.2LCD应用时序······························································································62.7.2.1并行方式AC特性及时序···································································62.7.2.2并行方式AC特性及时序···································································72.7.3系统功能······································································································82.7.3.1功能描述·······························································································82.7.3.2忙标志(BF)···························································································92.7.3.3地址计数器(AC)··················································································92.7.3.4中文字型生成ROM(CGROM)及半宽字型ROM(HCGROM)·········92.7.3.5字型产生RAM(CGRAM)···································································92.7.3.6ICONRAM(IRAM)··············································································92.7.3.7显示数据RAM(DDRAM)···································································92.7.3.8图形显示RAM(GDRAM)·································································102.7.3.9光标/闪烁···························································································102.7.4指令集········································································································102.7.4.1基本指令集(RE=0)·············································································102.7.4.2扩充指令集（RE=1）·······································································142.7.4.3基本指令集初始值(Registerflag)(RE=0)·········································14正弦信号发生器-III-2.7.5LCD驱动电源连接方式············································································152.7.6液晶显示模块显示中文时RAM地址对应表········································152.7.7控制器中内藏的字符表（16×8半宽字型）··········································162.7.8接口引脚定义····························································································162.8直流稳压电源····································································································································173软件程序设计·········································································································183.1程序流程图·········································································································································183.&&&&&&&&1.1主程序········································································································183.1.2外部中断0子程序····················································································193.1.3T2中断子程序···························································································203.2C语言程序清单································································································································203.3C语言程序解析································································································································303.3.1运算符的优先级和结合性········································································303.3.2库函数········································································································313.3.3功能界面建立相关函数············································································383.3.4键盘响应相关函数····················································································383.3.5提示信息显示相关函数············································································39结论···························································································································40致谢····························································································错误！未定义书签。&&&&&&&&参考文献·····················································································································47附录I························································································································48附录ΙΙ······················································································································60附录III·····················································································································61附录IV·····················································································································62正弦信号发生器-1-1绪论&&&&&&&&1.1课题背景DDS技术目前已成为频率合成技术发展的主流方向，它高度的集成性，对于简化电子系统的设计方案，降低硬件的复杂程度，提高系统的整机性能意义重大。&&&&&&&&用这种方法产生线性调频信号及其它复杂波形信号的技术日益受到重视，并得到广泛的应用。&&&&&&&&近年来，随着直接数字频率合成技术(directdigitalfrequencysynthesis，简称DDS)的发展，基于DDS技术的合成信号发生器，在正弦信号源的设计与使用中日益广泛．它与以往的射频信号源、锁相信号源和模拟频率合成信号源相比较，其频率分辨率高，指定频率的重复性好，而且易于程序控制．DDS技术的原理主要是通过相位与幅度的对应关系实现的，由于不同的控制字对应相位累加器中不同的相位累加速度，用此速度从正弦幅值表中进行查询，获得指定的幅度序列，最后通过数模转换输出。&&&&&&&&1.2系统结构对一个系统来说，系统结构的好坏是非常重要的。&&&&&&&&我本着实现所有要求的功能的基础上，简化系统结构，这样可以降低成本，也可以减少一些电路本身的干扰。&&&&&&&&对于本系统我采用了四个模块，即：键盘模块、控制模块、显示模块、正弦信号发生模块。&&&&&&&&各个模块之间的关系如下图。&&&&&&&&图&&&&&&&&1.1系统总框图根据系统总框图可知CPU是用来处理键盘传来的按键信号，并且控制显示模块和正弦信号产生模块的正常工作的。&&&&&&&&本系统的核心是正弦信号产生模块，因它是产生正弦信号的中心，其它器件只是让整个系统更加完善。&&&&&&&&键盘正弦信号产生显示CPU沈阳工程学院毕业设计（论文）-2-2硬件电路设计2.1系统设计方案正弦信号发生器待选方案有两个：方案一：利用单片机查询正弦表的方法来产生正弦信号。&&&&&&&&此方法的优点是电路简单，易实现程控。&&&&&&&&缺点是输出信号频率范围比较窄，而且输出信号的波形好坏和单片机查询的正弦表有密切关系，既在正弦波的一个周期内所查的正弦表次数越多，则正弦波的波形越好。&&&&&&&&但是单片机的负担也变大了，计算量将明显提高，则单片机的大部分资源被输出正弦波的工作所占用。&&&&&&&&方案二：利用模拟电路知识中的振荡电路的方法来产生正弦信号。&&&&&&&&此方法的优点是输出信号频率范围比较宽。&&&&&&&&缺点是电路的抗干扰能力比较差，不易实现程控，当输出频率比较高时电路设计比较困难。&&&&&&&&方案三：利用DDS技术来产生正弦信号。&&&&&&&&此方法的优点是输出信号的频率范围比较宽，电路比较简单，易于实现程控。&&&&&&&&缺点是DDS器件价格有点高，一般在一百元以上，而且多数是帖片元件，这对于焊接工艺要求比较高。&&&&&&&&由于DDS技术的发展，再加上生活水平的提高，本次设计我采用DDS技术。&&&&&&&&2.2方案论证按照系统功能要求，决定CPU模块采用AT89S52单片机，正弦信号产生模块采用AD8950，显示模块采用LCD，键盘模块采用5;4键盘。&&&&&&&&系统除能确保实现要求的功能外，还可以方便地进行其它功能的扩展。&&&&&&&&正弦信号发生器系统设计方案框图如图2.1所示。&&&&&&&&正弦信号发生器系统硬件电路由单片机、AD9850、LCD显示电路和按键处理电路等组成，它的硬件电路如附录所示。&&&&&&&&图2.1设计方案框图AT89S524×4键盘8279LCD显示AD9850正弦信号发生器-3-2.3正弦信号发生器的基本原理根据系统的功能要求，控制系统采用AT89S52单片机，正弦信号发生模块采用AD9850。&&&&&&&&AD9850是专业的正弦信号发生器件。&&&&&&&&通过单片机对AD9850的控制可以输出不同频率的正弦波。&&&&&&&&并且可以通过LCD显示频率值，以便于更好的实现人机界面。&&&&&&&&2.4AT89S52的简介单片微机(Single-ChipMicrocomputer)简称为单片机。&&&&&&&&它在一块芯片上集中成了中央处理单元CPU、随机存储器RAM、只读存储器ROM、定时/计数和多功能输入/输出I/O口，如并行口I/O、串行口I/O和转换A/D等。&&&&&&&&就其组成而言，一块单片机就是一台计算机。&&&&&&&&其典型结构如图2.2所示。&&&&&&&&由于它具有体积小、功能强和价格便宜等优点，因而被广泛地应用于产品智能化和工业控制自动化上。&&&&&&&&时钟电路总线控制CPUROM/EPROM/FLASH4K字节RAM128字节SFR21个定时/计数器2个中断系统5中断源、2优先级串行口全双工2个并行口4个RSTEAALEPSENXTAL2XTAL1P0P1P2P3VCCVSS图2.2单片机典型内部组成原理图单片机特点：a)单片机体积小巧、使用灵活、成本低，易于真正产品化。&&&&&&&&组装各种智能式控制设备和仪器，能做到机电仪一体化。&&&&&&&&b)面向控制。&&&&&&&&能有针对性地解决各种从简单到复杂的各类控制任务，因而能获得最佳的性能价格比。&&&&&&&&c)抗干扰能力强，适应温度范围宽，在各种恶劣的环境下都能可靠的工作。&&&&&&&&这是其它微机集中无法比拟的。&&&&&&&&d)可以方便的实现多机、分布式的集散控制，使整个控制系统的效率大大地提高。&&&&&&&&e)单片机应用产品的研制周期短，所开发出来的样机就是以后批量生产的产品，可以避免不必要的二次开发过程。&&&&&&&&单片机应用：a)工业方面：电机控制，工业机器人，过程控制，智能传感器，机电仪一体化等。&&&&&&&&沈阳工程学院毕业设计（论文）-4-b)仪器仪表方面：智能仪器，医疗仪器，色谱仪，示波器等。&&&&&&&&c)家用电器：高级电子玩具，微波灶，洗衣机，录像机等。&&&&&&&&d)电讯方面：调制解调器，智能通讯设备等。&&&&&&&&e)导航与控制方面：导弹控制，鱼雷制导控制，智能武器装置，航天导航系统等。&&&&&&&&f)数据处理方面：图形终端，彩色与黑白复印机，温式硬盘驱动器，磁带机，打印机等。&&&&&&&&g)汽车方面：点火控制，变速器控制，防滑刹车，排气控制等。&&&&&&&&MCS-51系列单片机在我国得到了广泛的应用，是单片机的主流系列，软硬件应用设计资料丰富齐全。&&&&&&&&为了提高指令的执行速度和效率，采用了面向控制的结构和指令系统的独立CPU，即选择Atmel公司的AT89S52单片机。&&&&&&&&XTAL218XTAL119ALE30EA31PSEN29RST9P0.0/AD039P0.1/AD138P0.2/AD237P0.3/AD336P0.4/AD435P0.5/AD534P0.6/AD633P0.7/AD732P1.0/T21P&&&&&&&&1.1/T2EX2P1.23P1.34P1.45P1.56P1.67P1.78P3.0/RXD10P3.1/TXD11P3.2/INT012P3.3/INT113P3.4/T014P3.7/RD17P3.6/WR16P3.5/T115P2.7/A/A821P2.1/A922P2.2/A/A/A/A/A图2.3AT89S52引脚排列AT89S52是低功耗，高性能，采用CMOS工艺的8位单片机。&&&&&&&&其片内具有8KB的可在线编程的Flash存储器。&&&&&&&&该单片机采用了ATMEL公司的高密度、非易失性存储器技术，与工业标准型AT89S52单片机的握住系统和引脚完全兼容；片内的Flash存储器可在线重新编程，或使用通用的非易失性存储器编程器；通用的8位CPU与在线可编程Flash集成在一块芯片上，从而使AT89S52功能更加完善，应用更加灵活；具有较高的性能价格比，使其在嵌入式控制系统中有着广泛的应用前景。&&&&&&&&AT89S52单片机具有如下特性：?片内存储器包含8KB的Flash，可在线编程，擦写次数不少于1000次；?具有256字节的片内RAM；?具有可编程的32根I/O口线（P0、P&&&&&&&&1、P2和P3口）；?具有3个可编程定时器T0，T1和T2；?内含2个数据指针DPTR0和DPTR1；?中断系统是具有8个中断源、6个中断矢量、2级优先权的中断结构；?串行通信口是1个全双工的UART串行口；?2种低功耗节电工作方式为空闲模式和掉电模式；?具有3级程序锁定位；?含有1个看门狗定时器；正弦信号发生器-5-?具有断电标志POF；?AT89S52的工作电压为4.0～5.5V；?全静态工作模式为0～3MHz（AT89S52）和0～16MHz（AT89LS52）；?与MCS-51产品完全兼容。&&&&&&&&2.4.1CPU系统8位CPU，含布尔处理器；时钟电路；总线控制逻辑。&&&&&&&&2.4.2存储器系统8K的程序存储器（Flash），可外扩至64K；256的数据存储器（RAM，可再外扩64K）；特殊功能寄存器SFR。&&&&&&&&2.4.3I/O口和其它功能单元4个并行I/O口；3个16位定时/计数器；1个全双工异步串行口；中断系统（8个中断源、2个优先级）。&&&&&&&&2.4.4AT89S52的时钟电路的接法图2.4AT89S52的时钟电路的接法如上图所示，左图是内部时钟方式，右图是外部时钟方式。&&&&&&&&由于AT89S52内部有时钟，所以我选择左图的外部时钟方式。&&&&&&&&晶振选择12MHz，C&&&&&&&&1、C2电容选择30pF（5~30pF都可以）。&&&&&&&&振荡器C1C2CYS悬空外部时钟信号XTAL1XTAL2XTAL2XTAL1沈阳工程学院毕业设计（论文）-6-2.4.5时钟信号晶振周期为最小的时序单位。&&&&&&&&一个时钟周期包含2个晶振周期。&&&&&&&&一个机器周期包含12个晶荡周期或6个时钟周期。&&&&&&&&如本设计用的是12MHz的晶振频率，则机器周期为1μS，指令周期为1~4μS。&&&&&&&&每个机器周期中ALE信号有效两次，具有稳定的频率可以将基作为外部设备的时钟信号。&&&&&&&&所以ALE引脚的频率是单片机时钟频率的1/6。&&&&&&&&应注意的是，在对片外RAM进行读/写时，ALE信号会出现非周期现象。&&&&&&&&2.4.6AT89S52的各个管脚的功能介绍&&&&&&&&（1）电源及时钟引脚Vcc：电源接入引脚；Vss：接地引脚；XTAL1：晶体振荡器接入的一个引脚，（采用外部振荡器时，此引脚接地）；XTAL2:晶体振荡器接入的另一个引脚（采用外部振荡器时，此引脚作为外部振荡信号的输入端）；（2）控制线引脚RST/VPD：复位信号输入引脚/备用电源输入引脚；ALE/PROG：地址允许信号输出引脚/编程脉冲输入引脚；EA/VPP：内外有储器选择引脚/片内FlashROM编程电压输入引脚；PSEN：外部程序存储器信号输出引脚。&&&&&&&&（3）并行I/O引脚（32个，分成4个8位口）P0.0~P0.7：一般I/O口引脚或数据/低位地址总线复用引脚；P1.0~P1.7：一般I/O口引脚和定时器T2定义的引脚；P2.0~P2.7：一般I/O口引脚或高位地址总线引脚；P3.0~P3.7：一般I/O口引脚或第二功能引脚。&&&&&&&&P1.0和P&&&&&&&&1.1引脚的第二功能P1.0：T2（T2的外部计数输入）；P&&&&&&&&1.1：T2EX（T2的外部控制）；&&&&&&&&（1）P3.0~P3.7引脚的第二功能P3.0：RXD（串行口输入）；P3.1：TXD（串行口输出）；P3.2：INT0（外部中断0输入）；P3.3：INT1（外部中断1输入）；P3.4：T0（定时/计数器0的外部输入）；P3.5；T1（定时/计数器1的外部输入）；P3.6：WR（片外数据存储器“写”控制输出）；P3.7：RD（片外数据存储器“读”控制输出）；正弦信号发生器-7-（2）并行口的负载能力P0、P&&&&&&&&1、P2、P3口的输入和输出电平与CMOS电平和TTL电平均兼容。&&&&&&&&P0口的每一个位口线可以驱动8个LSTTL负载。&&&&&&&&在作为通用I/O口时，由于输出驱动电路是开漏方式，由集电极开路（OC门）电路或漏极开路电路驱动时需外接上拉电阻；当作为地址/数据总线使用时，接口线输出不是开漏的，无在须外接上拉电阻。&&&&&&&&P&&&&&&&&1、P2、P3口的每一位能驱动4个LSTTL负载。&&&&&&&&它们的输出劝电路设有内部上拉电阻，所以可以方便地由集电极开路（OC门）电路或漏极开路电路所驱动，而无须外接上拉电阻。&&&&&&&&由于单片机口线仅能提供几毫安的电流，当作为输出驱动一般