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ipad3 电路图
8765432REV101ECN1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.DESCRIPTION OF REVISIONENGINEERING RELEASEDCK APPD DATEJ2 MLB - DVT OK2FABLAST_MODIFIED=Tue SepDPDF CSA CONTENTSTABLE_TABLEOFCONTENTS_HEAD6 17:35:11 2011DSYNC MASTERX26_WIFI_MIKE_BT X26_WIFI_MIKE_BT MADHAVI MADHAVI MADHAVI MLB MADHAVI ALEX ALEX MIKE MIKE MIKE MIKE MIKE MIKE MIKE MIKESYNC MASTERMIKE J2DEV MIKE MIKE JOE MIKE JOE MIKE MIKE ALEX CHOPIN MIKE MIKE MIKE ALEX JOE RAMSIN RAMSIN KAVITHA KAVITHA KAVITHA KAVITHA KAVITHA MARK MARK MARK JOE JOE JOE JOE X26_WIFI_MIKE_BTDATENA N/A N/A N/A N/A N/A 01/13/2011 N/A N/A N/A 12/10/2010 N/A 06/21///////////////////2011PDF CSA CONTENTSTABLE_TABLEOFCONTENTS_HEADDATE09/01/////////////////20111TABLE_TABLEOFCONTENTS_ITEM1 2 4 6 7 8 9 10 11 12 13 14 16 17 21 22 30 31 36 37 38 42 43 54 55 56 57 58 59 60 61Table of Contents BLOCK DIAGRAM: SYSTEM BOM TABLES AP: MAIN AP: I/Os AP: NAND AP: TV,DP,MIPI AP: DDR AP: POWER AP: MISC & ALIASES AP: VIDEO BUFFER,BB USB MUXES NAND DDR 0 AND 1 DDR 2 AND 3 MLB ALIASES/CONNECTIONS VIDEO: EDP CONNECTOR GRAPE: GROUNDHOG,CONN,BOOST GRAPE: Z1, Z2 AUDIO: L63B CODEC AUDIO: SPEAKER AMP AUDIO: HEADPHONE OUT AUDIO: DETECT/MIC BIAS AUDIO: HP/MIC FILTERS CONNECTOR: SENSOR SENSOR PANEL FILTERS 1 SENSOR PANEL FILTERS 2 IO FLEX: DOCK COMPONENTS DISPLAY PORT MISC IO FLEX: B2B CONNECTOR CONNECTOR: X26 WLAN BB & POWER32TABLE_TABLEOFCONTENTS_ITEM62 63 75 80 81 82 83 90 93 150 151 152 153 154 155 156 157WLAN 2.4GHZ AND ANT WLAN 5GHZ AND TEST POINTS POWER: BATTERY CONNECTOR POWER ALIASES POWER: AMELIA PMU POWER: AMELIA PMU POWER: AMELIA VSS DEBUG AND MISC FCT/ICT TEST/BRACKETS CONSTRAINTS: MLB RULES CONSTRAINTS: LOW SPEED BUS CONSTRAINTS: DISPLAY/AUDIO CONSTRAINTS: DDR/FMI CONSTRAINTS: POWER / GND CONSTRAINTS: DEBUG FUNC TEST POINTS FUNC TEST POINTS2TABLE_TABLEOFCONTENTS_ITEM33TABLE_TABLEOFCONTENTS_ITEM3TABLE_TABLEOFCONTENTS_ITEM34TABLE_TABLEOFCONTENTS_ITEM4TABLE_TABLEOFCONTENTS_ITEM35TABLE_TABLEOFCONTENTS_ITEM5TABLE_TABLEOFCONTENTS_ITEM36TABLE_TABLEOFCONTENTS_ITEM6TABLE_TABLEOFCONTENTS_ITEM37TABLE_TABLEOFCONTENTS_ITEM7TABLE_TABLEOFCONTENTS_ITEM38TABLE_TABLEOFCONTENTS_ITEM8TABLE_TABLEOFCONTENTS_ITEM39TABLE_TABLEOFCONTENTS_ITEM9TABLE_TABLEOFCONTENTS_ITEM40TABLE_TABLEOFCONTENTS_ITEMC10TABLE_TABLEOFCONTENTS_ITEM41TABLE_TABLEOFCONTENTS_ITEMC11TABLE_TABLEOFCONTENTS_ITEM42TABLE_TABLEOFCONTENTS_ITEM12TABLE_TABLEOFCONTENTS_ITEM43TABLE_TABLEOFCONTENTS_ITEM13TABLE_TABLEOFCONTENTS_ITEM44TABLE_TABLEOFCONTENTS_ITEM14TABLE_TABLEOFCONTENTS_ITEM45TABLE_TABLEOFCONTENTS_ITEM15TABLE_TABLEOFCONTENTS_ITEM46TABLE_TABLEOFCONTENTS_ITEM16TABLE_TABLEOFCONTENTS_ITEM47TABLE_TABLEOFCONTENTS_ITEM17TABLE_TABLEOFCONTENTS_ITEM48TABLE_TABLEOFCONTENTS_ITEM18TABLE_TABLEOFCONTENTS_ITEM19TABLE_TABLEOFCONTENTS_ITEMB20TABLE_TABLEOFCONTENTS_ITEM21TABLE_TABLEOFCONTENTS_ITEMB22TABLE_TABLEOFCONTENTS_ITEM23TABLE_TABLEOFCONTENTS_ITEM24TABLE_TABLEOFCONTENTS_ITEM25TABLE_TABLEOFCONTENTS_ITEM26TABLE_TABLEOFCONTENTS_ITEM27TABLE_TABLEOFCONTENTS_ITEM28TABLE_TABLEOFCONTENTS_ITEM29TABLE_TABLEOFCONTENTS_ITEM30TABLE_TABLEOFCONTENTS_ITEMA31TABLE_TABLEOFCONTENTS_ITEMSYNC_MASTER=MIKEDRAWING TITLESYNC_DATE=NAASCH,J2,MLBDRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGEDRAWING MLBDRAWINGNOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVEDSchematic / PCB #’s1 OF 157 1 OF 48SHEET8765432187654ISP_I2C1 MIPI1C ISP_I2C0 MIPI0C HSIC1_1 UART3 UART6321Z2CSA 31SPI1H4GDUAL-CORE ARM CORTEX-A9 W/ SMP 950 MHZFF CAMERAVGA FLEXREAR CAMERAVA5/8 FLEXDDWIFI/BT BT_I2SCSA 61-64GROUNDHOGCSA 30Z1CSA 31MIMOWIFI ANT 1 WIFI/BT ANT 2LPDDR21 GBYTE 4X32-BIT400MHZ/800MB/SQUAD-CORE IMG SGX543-MP2GPUDISPLAY/ TOUCH PANELRESOLUTION: AUDIOEDP AE2 ARM A5 CPUCELLULAR/GPSX26HSIC0_1 UART1HSIC1 USARTPRIMARY CELLULAR ANT DIVERSITY CELLULAR ANTCSPI2IPCCSA 60GPS ANTCBACKLIGHT UART5 USB2.0 UART0 DISPLAYPORTCSA 75PMU AMELIABATTERY30-PIN DOCKI2C 8’H78DWI I2C0VIDEO DACAMPCSA 81,82BI2C1 HALL EFFBUTTON FLEXAUDIO CODECL63B PROX SENSORI2C 8’H58BCSA 57COMPASSI2C 8’H1CI2S2 I2S0 I2S3 I2C2 FMI0 FMI1 FMI2 FMI3VSP ASP XSPLINEOUT AMPSENSOR PANELSENSOR PANELSPEAKER AMP MICI2C 8’H94CSA 36MUX US/CHINAI2C 8’H76EXT MICSYNC_DATE=N/AASYNC_MASTER=J2DEVPAGE TITLEAGYROI2C 8’HD0ACCELEROMETERI2C 8’H32ALSI2C 8’H72BLOCK DIAGRAM: SYSTEMDRAWING NUMBERSENSOR PANELSENSOR PANELVGA FLEXNAND FLASH NAND FLASH PPN1.0 PPN1.0CSA 14 CSA 14Apple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED2 OF 157 2 OF 48SHEET876543218765PART# 051-6 085-30584SCH AND BOARD P/NQTY 1 1 1 DESCRIPTION SCH,MLB,J2 PCBF,MLB,J2 DEV BOM,MLB,J23TABLE_5_HEAD2CRITICAL CRITICAL CRITICAL BOM OPTIONTABLE_5_ITEM1Page NotesPower aliases required by this page: (NONE) Signal aliases required by this page: (NONE) BOM options provided by this page:REFERENCE DESIGNATOR(S) SCH1 PCB1 DEV1?TABLE_5_ITEM?TABLE_5_ITEM?SOCTABLE_5_HEADDPART#QTY 1DESCRIPTION IC,SOC,H4G,FCBGA1225REFERENCE DESIGNATOR(S) U0600CRITICAL CRITICALBOM OPTIONTABLE_5_ITEMDALL AVAIL BOM OPTIONSCOMMON ALTERNATE 16GB_PROD 32GB_PROD 64GB_PROD 128GB_PROD DEVELOPMENT_JTAG DEVELOPMENT_JTAG_TAP JTAG_DAP SPEAKER INTERNAL_MIC NAND_IO_1V8 NAND_IO-3V3 SNOTE DEV MLB J2TABLE_BOMGROUP_HEAD343S0533?PMUTABLE_5_HEADPART# 343S0561QTY 1DESCRIPTION IC,PMU,AMELIA,D1974ABREFERENCE DESIGNATOR(S) U8100CRITICAL CRITICALBOM OPTIONTABLE_5_ITEM?SDRAMTABLE_5_HEADBOM GROUP BASIC AUDIOBOM OPTIONSTABLE_BOMGROUP_ITEMPART# 333S0579TABLE_BOMGROUP_ITEMQTY 2DESCRIPTIONREFERENCE DESIGNATOR(S) UCRITICAL CRITICALBOM OPTIONTABLE_5_ITEMCOMMON,ALTERNATESPEAKER,INTERNAL_MICSDRAM,LPDDR2,512MB,SAMSUNG 46NM?TABLE_ALT_HEADPART NUMBER 333S0580ALTERNATE FOR PART NUMBER 333S9BOM OPTIONREF DESCOMMENTS:TABLE_ALT_ITEMU LPDDR2,HYNIX 44NMTABLE_ALT_ITEMCBARCODE LABEL/EEEE CODESTABLE_5_HEAD333S0581U LPDDR2,ELPIDA 45NMCPART# 825-1 825-1 825-1 825-1 825-1QTY 1 1 1 1 1 1 1 1 1 1DESCRIPTION EEEE FOR 639-2352 (J1 16G) EEEE FOR 639-2058 (J1 32G) EEEE FOR 639-2059 (J1 64G) EEEE FOR 639-2353 (J2 16G) EEEE FOR 639-1572 (J2 32G) EEEE FOR 639-1871 (J2 64G) EEEE FOR 639-1870 (J2 128G) EEEE FOR 639-2844 (J2A 16G) EEEE FOR 639-2826 (J2A 32G) EEEE FOR 639-2827 (J2A 64G)REFERENCE DESIGNATOR(S) EEEE_DNKT EEEE_DM2N EEEE_DM2P EEEE_DNKV EEEE_DHWV EEEE_DKQL EEEE_DKQK EEEE_DRJQ EEEE_DRF6 EEEE_DRF5CRITICALBOM OPTIONTABLE_5_ITEMCRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICALEEEE_J1_16GTABLE_5_ITEMNAND 16GB FLASH CONFIGURATIONSTABLE_5_HEADEEEE_J1_32GTABLE_5_ITEMPART# 335S0781QTY 1DESCRIPTION HYNIX 26NM PPN1.0 16GBREFERENCE DESIGNATOR(S) U1400CRITICAL CRITICALBOM OPTIONTABLE_5_ITEMEEEE_J1_64GTABLE_5_ITEM16GB_PRODEEEE_J2_16GTABLE_5_ITEMTABLE_ALT_HEADPART NUMBER 335S0804EEEE_J2_32GTABLE_5_ITEMALTERNATE FOR PART NUMBER 335S0781BOM OPTION 16GB_PRODREF DES U1400COMMENTS:TABLE_ALT_ITEMEEEE_J2_64GTABLE_5_ITEMTOSHIBA 24NM PPN1.0EEEE_J2_128GTABLE_5_ITEMEEEE_J2A_16GTABLE_5_ITEM32GB FLASH CONFIGURATIONSTABLE_5_HEADEEEE_J2A_32GTABLE_5_ITEMPART# 335S0781QTY 2DESCRIPTION HYNIX 26NM PPN1.0 16GBREFERENCE DESIGNATOR(S) UCRITICAL CRITICALBOM OPTIONTABLE_5_ITEMEEEE_J2A_64G32GB_PRODTABLE_ALT_HEADPART NUMBERBMECHANICAL PARTS335S0804TABLE_5_HEADALTERNATE FOR PART NUMBER 335S0781BOM OPTION 32GB_PRODREF DESCOMMENTS:TABLE_ALT_ITEMU TOSHIBA 24NM PPN1.0PART# 806-7 806-0 806-2QTY 1 1 1 1 1 1DESCRIPTION FENCE,NAND,TOP,MLB,J2 FENCE,LARGE,TOP,MLB,J2 FENCE,SMALLER,TOP,MLB,J2 FENCE,1,BTM,MLB,J2 FENCE,2,BTM,MLB,J2 FENCE,SMALLER,BTM,MLB,J2REFERENCE DESIGNATOR(S) PD_FENCE_NAND PD_FENCE_LARGE PD_FENCE_SMALL PD_FENCE_BTM1 PD_FENCE_BTM2 PD_FENCE_BTM3CRITICALBOM OPTIONTABLE_5_ITEMBTABLE_5_HEADCRITICALTABLE_5_ITEMCRITICALTABLE_5_ITEM64GB FLASH CONFIGURATIONSPART# 335S0782 QTY 2 DESCRIPTION HYNIX 26NM PPN1.0 32GB REFERENCE DESIGNATOR(S) U CRITICAL CRITICAL BOM OPTIONTABLE_5_ITEMCRITICALTABLE_5_ITEMCRITICALTABLE_5_ITEM64GB_PRODCRITICALTABLE_5_ITEMTABLE_ALT_HEADPART NUMBER 335S0805CRITICALALTERNATE FOR PART NUMBER 335S0782BOM OPTION 64GB_PRODREF DESCOMMENTS:TABLE_ALT_ITEMU TOSHIBA 24NM PPN1.0128GB FLASH CONFIGURATIONSTABLE_5_HEADPART# 335S0814QTY 2DESCRIPTION HYNIX 26NM PPN1.0 64GBREFERENCE DESIGNATOR(S) UCRITICAL CRITICALBOM OPTIONTABLE_5_ITEM128GB_PRODTABLE_ALT_HEADPART NUMBER 335S0806ALTERNATE FOR PART NUMBER 335S0814BOM OPTION 128GB_PRODREF DESCOMMENTS:TABLE_ALT_ITEMU TOSHIBA 24NM PPN1.0ASYNC_MASTER=MIKEPAGE TITLESYNC_DATE=N/AABOM TABLESDRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED4 OF 157 3 OF 48SHEET876543218A1 A2 A5 A8 A11 A14 A17 A34 A35 AA2 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA24 AA26 AA35 AB1 AB4 AB8 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB25 AB27 AC3 AC8 AC10 AC18 AC20 AC22 AC24 AC28 AC32 AC34 AD2 AD8 AD9 AD11 AD19 AD21 AD23 AD25 AD27 AD29 AE1 AE8 AE9 AE10 AE18 AE20 AE22 AE24 AE26 AF3 AF8 AF9 AF27 AF30 AF32 AF34 AG2 AG8 AG9 AH1 AH8 AH9 AH10 AH11 AH12 AH17 AH22 AH25 AH26 AJ5 AJ13 AJ20 AJ29 AJ327U0600FCBGA OMIT (11 OF 12) AJ34 AK2 AL1 AM3 AM8 AM19 AM22 AM25 AM28 AM32 AM34 AN7 AN10 AN13 AN16 AP1 AP2 AP6 AP9 AP12 AP15 AP18 AP22 AP25 AP28 AP31 AP34 AP35 AR1 AR2 AR5 AR8 AR11 AR14 AR17 AR19 AR34 AR35 B1 B2 B4 B9 B12 B15 B34 B35 C7 C10 C13 C16 C30 C31 C32 C33 D3 D5 D8 D11 D14 D17 D30 D33 E1 E10 E21 E22 E24 E25 E26 E27 E28 E29 E30 E33 F2 F5 F16 F17 F21 F22 F24 F33 G3 G17 G18 G19 G20 G2135 46R0601=PP1V1_PLL_H4150.00 20% 1/32W MF 01005454PP1V1_PL3_FVOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM453R0605PP1V1_PL4_FVOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM2114 350.00 20% 1/32W MF 01005=PP1V1_PLL_H4H4G1C06000.01UF1C06030.01UFR0602110% 2 6.3V X5R 0100510% 2 6.3V X5R 010050.00 20% 1/32W MF 01005R0606145PP1V1_PL2_F45PP1V1_PL5_FVOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM0.00 20% 1/32W MF 010051DC06010.01UFR0603110% 2 6.3V X5R 01005VOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM1C06040.01UF10% 2 6.3V X5R 01005D80-OHM-0.2A-0.4-OHM1 2 0201FL06000.00 20% 1/32W MF 0100545PP1V1_PL1_F45PP1V1_MIPID_PLL_FVOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM=PP1V1_MIPI_PLL_H41C06020.01UFR0604110% 2 6.3V X5R 01005VOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM351C062056PF1C06210.01UF1C06221UF5% 6.3V 2 NP0-C0G 0100510% 6.3V 2 X5R 0100510% 2 6.3V CERM 4020.00 20% 1/32W MF 0100545PP1V1_PL0_F1=PP1V1_USB_H41C06070.01UF10% 2 6.3V X5R 01005VOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM4 35C06080.01UF1C06090.01UF10% 2 6.3V X5R 0100510% 2 6.3V X5R 0100535=PP1V1_HSIC_H41=PP3V3_USB_H44 35C06300.01UF1C06310.01UF1C06120.01UF1C06141UF10% 6.3V 2 X5R 0100510% 6.3V 2 X5R 0100510% 6.3V 2 X5R 0100510% 6.3V 2 CERM 40235=PP1V2_HSIC_H445R0607PP1V1_PLL_USB_FVOLTAGE=1.1V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM10.00 20% 1/32W MF 01005=PP1V1_USB_H41HSIC0_VDD121 P29 HSIC0_VDD122 P31 HSIC0_DVDD N31HSIC1_VDD121 K30 HSIC1_VDD122 J30 HSIC1_DVDD H32MIPI0D_VDD11_PLL F27 MIPI1D_VDD11_PLL F30PLL0_AVDD11 PLL1_AVDD11 PLL2_AVDD11 PLL3_AVDD11 PLL4_AVDD11 PLL5_AVDD1110% 6.3V 2 X5R 0100510% 6.3V 2 X5R 0100510% 6.3V 2 X5R 0100510% 6.3V 2 X5R 01005PLL_USB_AVDD11 M33CC06320.01UF1C06330.01UF1C06340.01UF1C0635V33 U33 T33 R33 P33 N33 U29 L30 R28 M284 350.01UF1C06150.01UFCUSB_VDD330USB_DVDD10% 6.3V 2 X5R 01005MLB10MABB42 30 42 307MA7MA2.5MA EACH28MAR0652WDOG AP29 AP_WDOGBI BIVSSVSSHSIC0_BB_DATA1 HSIC0_BB_STB146 4235JTAGSEL 0 - PARALLEL 1 - DAISY CHAIN (FOR USE WITH 5-WIRE JTAG) PER RADAR # 35 10 7 4 =PP1V8_H4 10 7 4 =PP1V8_H4NC_HSIC0_DATA2 NC_HSIC0_STB2WLAN40 15 42 40 1546 42BI BIHSIC1_WLAN_DATA1 HSIC1_WLAN_STB146 42 42 46NC_HSIC1_DATA2 NC_HSIC1_STB21100K 25% 1/32W 010051 5% 1/32W100K 21R1DEVELOPMENT_JTAG_TAPR0608INK35 L35 K33 L33 H35 J35 H33 J33 AK29 AM27 AR27 AP30 AN30 AJ27 AN29HSIC0_DATA1 HSIC0_STB1 HSIC0_DATA2 HSIC0_STB2 HSIC1_DATA1 HSIC1_STB1 HSIC1_DATA2 HSIC1_STB2 JTAG_SEL JTAG_TRTCK JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK34MA34MA0.00 2 1RST_PMU_IN2.5MAOUT37 45OMIT14MA 42U0600FCBGA (1 OF 12)0% 1/32W 01005 MFXTAL_24M_IH4GXI0 W35R06501.00M1% MF W2CRITICALY0602MF 0100510JTAG_AP_SEL46R06511SM-2 24.000MHZ-16PF-60PPM 142NC_JTAG_AP_TRTCKXO0 Y3542XTAL_24M_O2223 2 4 145 42 10 42 10100K 2OUT42 10 42 27 42 275% 1/32W 01005R06221JTAG_AP_TRST_L JTAG_AP_TDO JTAG_AP_TDI JTAG_AP_TMS JTAG_AP_TCK AP_TESTMODE5% 1/32W MF 0100524M_O1C065022PFC065122PF5% 16V CERM 01005100K 2B10INAH27 TESTMODE M31 FUSE1_FSRC5% 1/32W 01005USB_DP0 USB_DM0 USB_DP1 USB_DM1 USB11_DP0 USB11_DM0 USB11_DP1 USB11_DM1U35 T35 N34 M34 T34 R34 N35 P35USB_DK_D0_P USB_DK_D0_NNC_USB_D1_P NC_USB_D1_N42 46 42 4627 42 27 425% 16V 2 CERM 010052B11 42 11 4235 4=PP3V3_USB_H410OUTAP_TST_STPCLKTP_AP_TST_CLKOUTAR28 TST_STPCLK AR29 TST_CLKOUT AR33 FAST_SCAN_CLK AN28 HOLD_RESET AR30 RESET*USB11_MUX_D0_P USB11_MUX_D0_NNC_USB11_D1_P NC_USB11_D1_N42 46 42 46PPVBUS_USB146 4636 451R064010K10OUT IN45AP_FAST_SCAN_CLK AP_HOLD_RESET RST_AP_1V8_LR0609100K45 37 30 27INRST_AP_L 3.16V1% 1/32W MF 2 0100510USB_ANALOGTEST0 R30 USB_ANALOGTEST1 J28 USB_VBUS0 T30 USB_VBUS1 J32 USB_ID0 USB_ID1 USB_BRICKID0 USB_BRICKID1 T31 K32 T28 K31NC_USB_ANALOGTEST0 NC_USB_ANALOGTEST15% 1/32W MF 2 01005USB_AP_VBUS0 USB_AP_VBUS1NC_USB_ID0 NC_USB_ID146 461R0641100KIN102 GDZ-0201 1371% 1/32W MF 2 01005W6 CFSB0 AR32 CFSB1 L6 F9 AK10 AF6 DDR0_CKEIN DDR1_CKEIN DDR2_CKEIN DDR3_CKEINDZ0600GDZT2R5.1BUSB_BRICKID OUTNC_USB_BRICKID1461.75V1R0642142.2K1% 1/32W MF 01005 2C06401000PFUSB_REXT0 R31 USB_REXT1 K28 M32 PLL_USB_AVSS11USB_REXT0 USB_REXT11P28 HSIC0_VSS121 P30 HSIC0_VSS122 N30 HSIC0_DVSSK29 HSIC1_VSS121 J29 HSIC1_VSS122 H31 HSIC1_DVSS10% 2 16V X7R 201R344.21% 1/20W MF 2 201PLL0_AVSS11 PLL1_AVSS11 PLL2_AVSS11 PLL3_AVSS11 PLL4_AVSS11 PLL5_AVSS11USB_VSSA01.16VAP_DDR1_CKEIN_1V2AUSB_VSSACMIPI_VSSUSB_DVSS1% 1/20W MF 2 20144.2R0643182.5K1% 1/32W MF 01005 2SYNC_MASTER=MIKEPAGE TITLESYNC_DATE=N/AAAP: MAINDRAWING NUMBERV32 U32 T32 R32 P32 N32H24 H25 H26 H27 H28 H29U28 L31T29 L28 R29 L29Apple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED6 OF 157 4 OF 48SHEET8765432187654321U0600H4GR0700OMITD42 1933.2 1%1/32W MF 01005U0600H4G42 I2S0_ASP_MCKOMIT37 28 5 37 24 5OUTI2S0_ASP_MCK_R 142 192OUT OUT IN OUTCODEC ASP42 19 42 19 42 19I2S0_ASP_BCLK I2S0_ASP_LRCK I2S0_ASP_DIN I2S0_ASP_DOUT46 46AR26 AG24 AP26 AK25 AL25 AC15 AC17 AC14 AC16 AF26 AK27 AF24 AN26 AG25 AM26 AP27 AN27 AF25 AK26 AL26FCBGA (3 OF 12) I2S0_MCK I2C0_SCL I2S0_BCLK I2C0_SDA I2S0_LRCK I2S0_DIN I2C1_SCL I2S0_DOUT I2C1_SDA I2S1_MCK I2S1_BCLK I2S1_LRCK I2S1_DIN I2S1_DOUT I2S2_MCK I2S2_BCLK I2S2_LRCK I2S2_DIN I2S2_DOUT I2S3_MCK I2S3_BCLK I2S3_LRCK I2S3_DIN I2S3_DOUTIN IN IN IN OUT INAJ23 AK23 AN24 AR25I2C0_SCL_1V8 I2C0_SDA_1V8 I2C1_SCL_1V8 I2C1_SDA_1V8 I2C2_SCL_3V0 I2C2_SDA_3V0NC_SWI_AP4642 30HOME_EMI_L ONOFF_L HSIC_BB_RDY46BI OUT BI OUT BI OUT10 19 22 37 42 10 19 22 37 42TO CHARLESTON, CODEC AND PMU37 15NC_AP_GPIO310 25 42 10 25 42TO SENSOR BOARD19IRQ_PMU_L PM_BT_WAKE IRQ_CODEC_L46 46NC_AP_GPIO7 NC_AP_GPIO8NC_I2S1_MCK NC_I2S1_BCLK NC_I2S1_LRCK NC_I2S1_DIN NC_I2S1_DOUTI2C2_SCL AH21 I2C2_SDA AK21 SWI_DATA AC13 DWI_CLK AN25 DWI_DI AM24 DWI_DO AG2325 42 25 42TO SENSOR BOARD (ALS)30 5 45 30OUT IN IN IN INNOT USEDPM_RADIO_ON RST_DET_L4646 46 4646 42 19 15NC_I2S2_MCKCODEC VSP & BT42 19 15 42 19 15 42 19 15I2S2_VSP_BCLK OUT I2S2_VSP_LRCK I2S2_VSP_DIN IN OUT I2S2_VSP_DOUTOUT46DWI_AP_CLK DWI_AP_DI DWI_AP_DOOUT IN OUT37 42 37 42NOTE FOR GPIO12: - BB_DIAGS_READY (RADAR #9179861) - BB -& H4GNC_AP_GPIO1142 30SPI2_IPC_SRDY46NC_AP_GPIO1324 45 30 15 37 42AUD_VOL_DOWN_L GSM_TXBURST_IND46NC_BOARD_ID_326 5 10OUT IRQ_GYRO_INT2 IN IN OUT OUT OUT IN IN IN OUT IN IN INBOOT_CONFIG_046NC_I2S3_MCK42 19CODEC XSP42 19 42 19 42 19I2S3_XSP_BCLK I2S3_XSP_LRCK I2S3_XSP_DIN IN OUT I2S3_XSP_DOUTOUT OUT46SDIO0_CLK SDIO0_CMD SDIO0_DATA0 SDIO0_DATA1 SDIO0_DATA2 SDIO0_DATA3AL27 AR31 AK28 AL28 AM29 AM30NC_SDIO0_WL_CLK NC_SDIO0_WL_CMD NC_SDIO0_WL_DATA&0& NC_SDIO0_WL_DATA&1& NC_SDIO0_WL_DATA&2& NC_SDIO0_WL_DATA&3&NC_AP_GPIO1946 24 46 18 46 37 5 46 46 46NOTE FOR GPIO24: - AP_MODEM_WAKE (RADAR #9179861) - H4G -& BB30 30 10 39 5 5C10 10 10NC_AP_GPIO216AG27 SPDIF U6 W5 T6 W8 AF20 AF19 AG20 AM21 SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN SPI1_MISO SPI1_MOSI SPI1_SCLK SPI1_SSIN SPI3_MISO SPI3_MOSI SPI3_SCLK SPI3_SSIN SPI2_MISO SPI2_MOSI SPI2_SCLK SPI2_SSINTHERM_TEST_OUT THERM_RES_EXT VDDA18_TS VSSA18_TSIN IN INBOARD_ID_2 BOARD_ID_1 BOARD_ID_046NC_SPI_FLASH_CS_LAL30 AL29 AN32 AP33 AF23 AL23 AH23 AM23NC_SPI3_MISO NC_SPI3_MOSI NC_SPI3_SCLK NC_SPI3_CS_L10 46 10 46 42 15 5 46 46 26AUD_VOL_UP_L IRQ_GRAPE_HOST_INT_L PM_KEEPACT BB_EMERGENCY_DWLD IPC_GPIO_X26 BOOT_CONFIG_1 FORCE_DFU DFU_STATUS BOOT_CONFIG_2 BOOT_CONFIG_3 HSIC_WLAN_RDY46NC_AP_GPIO3142 17TO GRAPE 3.0V IO42 17 42 17 42 17IN SPI1_GRAPE_MISO OUT SPI1_GRAPE_MOSI OUT SPI1_GRAPE_SCLK OUT SPI1_GRAPE_CS_LSPI2_IPC_MISO SPI2_IPC_MOSI SPI2_IPC_SCLKNEW GPIO FOR J2.IN OUT OUT30 42 30 42 30 42FILE A RADAR26 42 5OUT IRQ_PROX_INT_L IN IRQ_GYRO_INT1 HSIC_HOST_READY_WL OUT46TO BB HSIC_HOST_RDY26NC_AP_GPIO35OUT5 30 42 25 26 20AJ16 TP_THERM_TEST_OUT AK16 THERM_RES_EXT AF16 AG161IRQ_ACCEL_INT1_L IN IRQ_ALS_INT_L IN IRQ_ACCEL_INT2_L OUT AUD_SPKRAMP_MUTE_LIN OUT PORT_DOCK_VIDEO_AMP_EN46AJ14 AK15 AL16 AG14 AP19 AH13 AH16 AE13 AE12 AH15 AG17 AD13 AK17 AE14 AL17 AF17 AL18 AK18 AJ18 AD12 AH18 AF18 AM18 AN18 AN19 AG18 AP20 AN20 AR20 AR21 AP21 AK19 AN21 AH19 AG19 AJ19 AR22 AL20 AM20 AN22GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39FCBGA (2 OF 12) EHCI_PORT_PWR0 AG26 EHCI_PORT_PWR1 AE15 EHCI_PORT_PWR2 AE16 TMR32_PWM0 AD16 TMR32_PWM1 AD14 TMR32_PWM2 AC12GPIO40_BRD_REV0 GPIO41_BRD_REV1 GPIO42_BRD_REV2NC_AP_GPIO185 NC_AP_GPIO18646 46IN IN IN10 10 10DTP_LED_STROBE_ENUART0_RXD AH14 UART0_TXD AG15 UART1_CTSN AP23 UART1_RTSN AL21 UART1_RXD AG21 UART1_TXD AF21 UART2_CTSN U5 UART2_RTSN T7 UART2_RXD U8 UART2_TXD T5 UART3_CTSN AG22 UART3_RTSN AJ21 UART3_RXD AR24 UART3_TXD AR23 UART4_CTSN Y6 UART4_RTSN Y7 UART4_RXD W7 UART4_TXD Y5 UART5_RTXD AL22 UART6_CTSN U9 UART6_RTSN V6 UART6_RXD U7 UART6_TXD V7UART0_AP_RXD UART0_AP_TXD UART1_BB_CTS_L UART1_BB_RTS_L UART1_BB_RXD UART1_BB_TXDIN OUT IN OUT IN OUT15 42 15 42TO DOCK MUX30 42 30 42TO BB USART30 42 30 42SRL_L IN RST_BB_L OUTNC_UART2_RXD NC_UART2_TXD46 465 24 37 30 45UART3_BT_CTS_L UART3_BT_RTS_L UART3_BT_RXD UART3_BT_TXDNC_UART4_CTS_L NC_UART4_RTS_L46 46IN OUT IN OUT15 42 15 42TO BT UART15 42 15 42CNC_UART4_RXD NC_UART4_TXD46 46BATTERY_SWI OUTNC_UART6_CTSN NC_UART6_RTSN46 4634 37R0720100K111R1030100K1% 1/32W MF 2 010055% 1/20W MF 2 201NC_AP_GPIO3V1AN31 GPIO_3V0 AP32 GPIO_3V1UART6_WLAN_RXD UART6_WLAN_TXDIN OUT15 42 15 42R118045PP1V8_VDDA18_TS10.00 20% 1/32W MF 01005=PP1V8_VDDA18_TS351BDEFAULT IS TO TIE HSIC_HOST_READY TO BOTH DEVICES BUT OPTION IS HERE IN CASE THEY NEED TO BE SEPARATE NOSTUFFC11880.01UFPM_KEEPACT IRQ_GYRO_INT2 FORCE_DFU DFU_STATUS PM_RADIO_ON135 9 5 37 5 26 5 39 5 5 3010% 6.3V 2 X5R 01005BR073042 30 5HSIC_HOST_RDY10.00 20% 1/32W MF 01005R0711100K1R0712100K1R0713100K1R0714100K1R0715100K=PP1V8_VDDIOD_H4 NOSTUFFHSIC_HOST_READY_WLAN15 425% 1/20W MF 2 2015% 1/32W MF 2 010055% 1/20W MF 2 2015% 1/20W MF 2 2015% 1/20W MF 2 201R073142 5HSIC_HOST_READY_WL0.00 2 10% 1/32W MF 01005R07221100K1% 1/20W MF 201 2R08851100K5% 1/20W MF 201 242 15 5HSIC_WLAN_RDYR070839 35 27 5=PP1V8_S2R_MISC1220K 25% 1/20W MF 20137 28 5HOME_EMI_LA35R0709=PP1V8_ALWAYS 15% 1/20W MF 201220K 2SYNC_MASTER=JOEPAGE TITLESYNC_DATE=N/AAAP: I/OsDRAWING NUMBER37 24 5ONOFF_LR071039 35 27 5=PP1V8_S2R_MISC1220K 25% 1/20W MF 201Apple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED37 24 5SRL_L7 OF 157 5 OF 48SHEET876543218G22 G23 G30 H1 H4 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H30 H34 J2 J8 J9 J10 J11 J12 J14 J16 J18 J20 J22 J24 J26 J31 J34 K3 K8 K9 K10 K11 K13 K15 K17 K19 K21 K23 K25 K27 K34 L32 L1 L4 L8 L10 L12 L14 L16 L18 L20 L22 L24 L26 M2 M3 M8 M9 M11 M13 M15 M17 M19 M21 M23 M25 M27 M30 L34 N3 N8 N10 N12 N14 N16 N18 N20 N22 N24 N267M35 P1 P8 P9 P11 P13 P15 P17 P19 P21 P23 P25 P27 R2 R8 R10 R12 R14 R16 R18 R20 R22 R24 R26 P34 T3 T9 T11 T13 T15 T17 T19 T21 T23 T25 T27 R35 U1 U10 U12 U14 U16 U18 U20 U22 U24 U26 U30 U31 V9 V11 V13 V15 V17 V19 V21 V23 V25 V27 V29 U34 V35 W1 W3 W10 W12 W14 W16 W18 W20 W22 W24 W26 W34 Y9 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 Y27 Y28 Y31 Y34645 9 65PPIO_NAND_H414321U0600FCBGA (12 OF 12)OMITH4GR0832100K1R0836100K1R4100K5% 1/32W MF 2 0100545 9 6PPIO_NAND_H4NOSTUFF1 5% 1/32W MF 2 010055% 1/32W MF 2 0100544 12 6 44 12 6 44 12 6 44 12 65% 1/32W MF 2 010055% 1/32W MF 2 01005100KNOSTUFF5% 1/32W MF 2 01005NOSTUFF1NOSTUFF1R1100K 100KR0802100KR0803100KDFMI1_CE0_L FMI1_CE1_L FMI0_CE0_L FMI0_CE1_L5% 1/32W MF 2 010055% 1/32W MF 2 0100544 12 6 44 12 6 44 12 6 44 12 6FMI0_WE_L FMI0_RE_N FMI1_WE_L FMI1_RE_N FMI0_ALE FMI0_CLE FMI1_ALE FMI1_CLED44 12 6 44 12 6 44 12 6 44 12 6NOSTUFF1NOSTUFF1NOSTUFF1 5% 1/32W MF 2 01005NOSTUFF5% 1/32W MF 2 01005R0810100KR0811100KR3100K 100K5% 1/32W MF 2 010055% 1/32W MF 2 0100535 28=PP3V0_IO_MISCCC1R0804100KU0600FCBGA (4 OF 12)44 12 6 44 12 6OMITH4G5% 1/32W MF 2 01005FMI2-3_CEN IS 3.0VOUT OUT46 46 46 46 46 46VSSVSSFMI0_CE0_L FMI0_CE1_L NC_FMI0_CE2_L NC_FMI0_CE3_L NC_FMI0_CE4_L NC_FMI0_CE5_L NC_FMI0_CE6_L NC_FMI0_CE7_L FMI0_AD&0& FMI0_AD&1& FMI0_AD&2& FMI0_AD&3& FMI0_AD&4& FMI0_AD&5& FMI0_AD&6& FMI0_AD&7& FMI0_ALE FMI0_CLE FMI0_WE_L FMI0_RE_N FMI0_DQS_P FMI1_CE0_L FMI1_CE1_L NC_FMI1_CE2_L NC_FMI1_CE3_L NC_FMI1_CE4_L NC_FMI1_CE5_L NC_FMI1_CE6_L NC_FMI1_CE7_L FMI1_AD&0& FMI1_AD&1& FMI1_AD&2& FMI1_AD&3& FMI1_AD&4& FMI1_AD&5& FMI1_AD&6& FMI1_AD&7& FMI1_ALE FMI1_CLE FMI1_WE_L FMI1_RE_N FMI1_DQS_PAH31 AF31 AD28 AG29 Y29 AH28 AG28 AM31 AG35 AF35 AH35 AH33 AG31 AG32 AG34 AH32 AE32 AF33 AH34 AE33 AG33 AJ33 AN33 AD30 AE30 AJ31 AJ30 AL31 AK31 AL32 AN35 AK32 AK33 AL33 AK34 AM33 AJ35 AN34 AK35 AM35 AL35 AL34FMI0_CEN0 FMI0_CEN1 FMI0_CEN2 FMI0_CEN3 FMI0_CEN4 FMI0_CEN5 FMI0_CEN6 FMI0_CEN7 FMI0_IO0 FMI0_IO1 FMI0_IO2 FMI0_IO3 FMI0_IO4 FMI0_IO5 FMI0_IO6 FMI0_IO7 FMI0_ALE FMI0_CLE FMI0_WEN FMI0_REN FMI0_DQS FMI1_CEN0 FMI1_CEN1 FMI1_CEN2 FMI1_CEN3 FMI1_CEN4 FMI1_CEN5 FMI1_CEN6 FMI1_CEN7 FMI1_IO0 FMI1_IO1 FMI1_IO2 FMI1_IO3 FMI1_IO4 FMI1_IO5 FMI1_IO6 FMI1_IO7 FMI1_ALE FMI1_CLE FMI1_WEN FMI1_REN FMI1_DQSFMI2_CEN0 FMI2_CEN1 FMI2_CEN2 FMI2_CEN3 FMI2_CEN4 FMI2_CEN5 FMI2_CEN6 FMI2_CEN7 FMI2_IO0 FMI2_IO1 FMI2_IO2 FMI2_IO3 FMI2_IO4 FMI2_IO5 FMI2_IO6 FMI2_IO7 FMI2_ALE FMI2_CLE FMI2_WEN FMI2_REN FMI2_DQS FMI3_CEN0 FMI3_CEN1 FMI3_CEN2 FMI3_CEN3 FMI3_CEN4 FMI3_CEN5 FMI3_CEN6 FMI3_CEN7 FMI3_IO0 FMI3_IO1 FMI3_IO2 FMI3_IO3 FMI3_IO4 FMI3_IO5 FMI3_IO6 FMI3_IO7 FMI3_ALE FMI3_CLE FMI3_WEN FMI3_REN FMI3_DQSAE35 AB28 AA28 AB30 AE28 AF28 AA29 AB31 AC31 AB33 AC35 AE34 AD34 AD32 AD35 AD31 AB34 AB32 AB35 AD33 AC33 W31 W28 W29 V30 AG30 AC30 AH30 AE31 AA34 W33 AA33 V34 AA30 V31 W32 Y30 Y33 W30 AA32 AA31 Y32SPK_ID IN 20 NC_FMI2_CE1_L 46 NC_FMI2_CE2_L 46 NC_FMI2_CE3_L 46 PM_LCDVDD_PWREN NEW GPIO FOR J2. FILE A RADAR OUT 16 NC_FMI2_CE5_L 46 RST_GRAPE_L OUT 17 45 CHECK WITH GRAPE ON VOLTAGE FOR THESE TWO SIGNALS GRAPE_FW_DNLD_EN_L OUT 17 NC_FMI2_AD&0& 46 NC_FMI2_AD&1& 46 NC_FMI2_AD&2& 46 NC_FMI2_AD&3& 46 NC_FMI2_AD&4& 46 NC_FMI2_AD&5& 46 NC_FMI2_AD&6& 46 NC_FMI2_AD&7& 46 NC_FMI2_ALE NC_FMI2_CLE NC_FMI2_WE_L NC_FMI2_RE_L NC_FMI2_DQS46 46 46 46 4644 12 44 12 44 12 44 12 44 12 44 12 44 12 44 12BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT46 46 46 46 46 46B44 12 6 44 12 6 44 12 6 44 12 6 44 12B44 12 6 44 12 6NC_FMI3_CE0_L 46 NC_FMI3_CE1_L 46 NC_FMI3_CE2_L 46 NC_FMI3_CE3_L 46 NC_FMI3_CE4_L 46 NC_FMI3_CE5_L 46 NC_FMI3_CE6_L 46 NC_FMI3_CE7_L 46 NC_FMI3_AD&0& 46 NC_FMI3_AD&1& 46 NC_FMI3_AD&2& 46 NC_FMI3_AD&3& 46 NC_FMI3_AD&4& 46 NC_FMI3_AD&5& 46 NC_FMI3_AD&6& 46 NC_FMI3_AD&7& 46 NC_FMI3_ALE NC_FMI3_CLE NC_FMI3_WE_L NC_FMI3_RE_L NC_FMI3_DQS46 46 46 46 4644 12 44 12 44 12 44 12 44 12 44 12 44 12 44 12BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT44 12 6 44 12 6 44 12 6 44 12 6 44 12ASYNC_MASTER=MIKEPAGE TITLESYNC_DATE=N/AAAP: NANDDRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGECHECK CONNECTION FOR VSSA18_TSNOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED8 OF 157 6 OF 48SHEET8765432187654453PP1V8_DP_AVDD_AUX12R09101 1102 1=PP1V8_DP_H435C09270.22UFC09260.22UF1C09250.22UF1C092456PF20% 6.3V 2 X5R 40220% 6.3V 2 X5R 40220% 6.3V 2 X5R 4025% 6.3V 2 NP0-C0G 010055% 1/20W MF 201C092356PF5% 6.3V 2 NP0-C0G 0100535 9=PP3V0_IO_H41D35C09530.01UF=PP1V1_DP_PAD_DVDD_H4135=PP1V1_MIPI_H4110% 6.3V 2 X5R 01005 1C09090.1UFDR0911110% 6.3V 2 X5R 201C09351UFC09080.1UF1C09030.1UF4510% 2 6.3V CERM 40210% 2 6.3V X5R 20110% 2 6.3V X5R 201PP1V8_EDP_AVDD_AUX102 1=PP1V8_EDP_H43535 7=PP3V0_VIDEO_H41C09340.22UF1C09330.22UF1C09320.22UF1C093156PF=PP1V8_MIPI_H44535C09511UF1C09520.01UF20% 6.3V 2 X5R 40220% 6.3V 2 X5R 40220% 6.3V 2 X5R 4025% 6.3V 2 NP0-C0G 010055% 1/20W MF 201C093056PF5% 6.3V 2 NP0-C0G 01005PP0V4_MIPI1DVOLTAGE=0.4V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM1C09070.1UF 240-OHM-0.2A-0.8-OHM35 710% 6.3V 2 X5R 20110% 6.3V 2 CERM 40210% 6.3V 2 X5R 01005FL0910020145PP0V4_MIPI0D MIPI0D_VREG_0P4V F26 MIPI1D_VREG_0P4V F29 G24 G25 G26 G27 G28 G29 MIPI0D_VDD18 F25 MIPI1D_VDD18 F28=PP3V0_VIDEO_H412DAC_AP_COMP_FTR DAC_AVDD30A G31 DAC_AVDD30D D32 DP_PAD_AVDD_AUX D28C26 C25 D24 D23DP_PAD_AVDDP0 D27DP_PAD_AVDDX B29DP_PAD_DVDD A29EDP_PAD_AVDD_AUX D20B18 A18 E19 E18EDP_PAD_AVDDP0 D19EDP_PAD_AVDDX C2111EDP_PAD_DVDD C22C09602.2NFC09612.2NFVOLTAGE=0.4V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MMVOLTAGE=1.8V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MMVOLTAGE=1.8V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM=PP1V1_EDP_PAD_DVDD_H4135C09100.1UFDAC_AP_OUT3 DAC_AP_OUT2 DAC_AP_OUT1OUT OUT OUT11 43 11 43 11 4310% 2 6.3V X5R 201DP_PAD_AVDDMIPI_VDD1114MA4 10 351R09301.00K1R09311.00K1R09321.00K1R09331.00K10% 6.3V 2 X5R 201EDP_PAD_AVDD10% 10V 2 X5R 20110% 10V 2 X5R 201=PP1V8_H41C09560.1UFC46U0600FCBGA (6 OF 12)OMIT4MA5% 1/32W MF 2 010055% 1/32W MF 2 010055% 1/32W MF 2 010055% 1/32W MF 2 010051R09552001R09562001R095720021MA6MA1.2MA 5MA332MA 2MA1.2MA 5MAH4G172MA 2MA45DAC_AP_VREF DAC_AP_IREFE31 DAC_VREF F31 DAC_IREF DAC_AP_COMP E32 DAC_COMP5MAOMIT5MANC_MIPI_VSYNC_H4AD15 MIPI_VSYNC D35 MIPI0C_DPDATA0 C35 MIPI0C_DNDATA0 B33 MIPI0C_DPDATA1 B32 MIPI0C_DNDATA1 B31 MIPI0C_DPDATA2 B30 MIPI0C_DNDATA2 A31 MIPI0C_DPDATA3 A30 MIPI0C_DNDATA3 A33 MIPI0C_DPCLK A32 MIPI0C_DNCLK43 25 43 25OUT OUT OUT OUT46 43 46 43MIPI0C_AP_DATA_P&0& MIPI0C_AP_DATA_N&0& MIPI0C_AP_DATA_P&1& MIPI0C_AP_DATA_N&1& NC_MIPI0C_AP_DATA_P&2& NC_MIPI0C_AP_DATA_N&2& NC_MIPI0C_AP_DATA_P&3& NC_MIPI0C_AP_DATA_N&3& MIPI0C_AP_CLK_P MIPI0C_AP_CLK_NISP0_FLASH ISP0_PRE_FLASH ISP0_SCL ISP0_SDA ISP1_FLASH ISP1_PRE_FLASH ISP1_SCL ISP1_SDAAD17 AF13 AK22 AF22 AF14 AE17 AP24 AN23 NC_ISP_AP_1_FLASH NC_ISP_AP_1_PRE_FLASH46 46U0600FCBGA (5 OF 12)CAM0_RESET_L 26 TP_CAM0_1V2_VDDCORE_EN ISP_AP_0_SCL OUT 25 42 ISP_AP_0_SDA BI 25 421C09550.1UFH4GDAC_OUT3 G33 DAC_OUT2 G34 DAC_OUT1 G351% 1/20W MF 2 2011% 1/20W MF 2 2011% 1/20W MF 2 201C1R09506.34K10% 2 6.3V X5R 2011% 1/20W MF 2 201DP_HPD AL15 DP_PAD_AUXP C28 DP_PAD_AUXN C27 DP_PAD_TX0P A28 DP_PAD_TX0N A27DP_AP_HPD DP_AP_AUX_P DP_AP_AUX_N DP_AP_TX_P&0& DP_AP_TX_N&0& DP_AP_TX_P&1& DP_AP_TX_N&1& DP_AP_TX_P&2& DP_AP_TX_N&2&IN OUT OUT OUT OUT OUT OUT OUT OUT37 4328 43 28 4343 25 43 25TP_DP_AP_ANALOG_TEST F23 DP_PAD_DC_TPISP_AP_1_SCL ISP_AP_1_SDAOUT BI25 42 2525 42 25 4228 43 28 4346 43 46 43SENSOR0_CLK AJ24 42 CLK_CAM_RF_R 1/32W SENSOR0_RST AK241 0% SENSOR1_CLK AH24 42 CLK_CAM_FF_R 1/32W SENSOR1_RST AL240.00 2 R% MF01005NOTE: 0.6V ANALOG REF AP_DP_R_BIAS1E23 DP_PAD_R_BIAS DP_PAD_TX1P D26 DP_PAD_TX1N D25 DP_PAD_TX2P B26 DP_PAD_TX2N B25 DP_PAD_TX3P C24 DP_PAD_TX3N C23CLK_CAM_RF PM_REAR_CAM_SHUTDOWNC09500.01UFNOSTUFF1R09204.99K28 43 28 430.00 2MF 01005R094043 25 43 25OUT OUTCLK_CAM_FF 25 42 PM_FRONT_CAM_SHUTDOWN 2525 43 25 4310% 6.3V 2 X5R 010051% 1/32W MF 2 0100528 43 28 43MIPI1C_DPDATA0 F34 MIPI1C_DNDATA0 E34 MIPI1C_DPDATA1 D34 MIPI1C_DNDATA1 C34 MIPI1C_DPCLK F35 MIPI1C_DNCLK E35MIPI1C_AP_DATA_P&0& OUT MIPI1C_AP_DATA_N&0& OUT NC_MIPI1C_AP_DATA_P&1& 43 NC_MIPI1C_AP_DATA_N&1& 4346 46DP LANES 2/3 ARE FOR STEVE-NOTE ONLY DP_AP_TX_P&3& OUT 28 43 DP_AP_TX_N&3& OUT 28 43EDP_HPD AJ15OUT OUT25 43 25 43EDP_AP_HPD EDP_AP_AUX_P EDP_AP_AUX_N EDP_AP_TX_P&0& EDP_AP_TX_N&0& EDP_AP_TX_P&1& EDP_AP_TX_N&1& EDP_AP_TX_P&2& EDP_AP_TX_N&2& EDP_AP_TX_P&3& EDP_AP_TX_N&3&IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT16 43BMIPI1C_AP_CLK_P MIPI1C_AP_CLK_NTP_EDP_AP_ANALOG_TESTF20 EDP_PAD_DC_TPEDP_PAD_AUXP A24 EDP_PAD_AUXN A23 EDP_PAD_TX0P D22 EDP_PAD_TX0N D2116 43 16 43B16 43 16 43NOTE: 0.6V ANALOG REF AP_EDP_R_BIAS1E20 EDP_PAD_R_BIAS EDP_PAD_TX1P B22 EDP_PAD_TX1N B21 EDP_PAD_TX2P C20 EDP_PAD_TX2N C19 EDP_PAD_TX3P A20 EDP_PAD_TX3N A19 B20 EDP_PAD_AVSS_AUX B28 DP_PAD_AVSS_AUX B19 EDP_PAD_AVSSP0 B27 DP_PAD_AVSSP0 EDP_PAD_AVSS A21 EDP_PAD_AVSSXC09570.01UFNOSTUFF1R09214.99K16 43 16 4310% 2 6.3V X5R 010051% 1/32W MF 2 0100516 43 16 4316 43 16 43G32 DAC_AVSS30A1 F32 DAC_AVSS30A2DP_PAD_AVSSD29 DP_PAD_AVSSXAA22 EDP_PAD_DVSSD31 DAC_AVSS30DC29 DP_PAD_DVSSA26 A25 B24 B23D18 C18 F19 F18SYNC_MASTER=JOEPAGE TITLESYNC_DATE=01/13/2011AAP: TV,DP,MIPIDRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:TABLE_ALT_HEADPART NUMBER 132S0279ALTERNATE FOR PART NUMBER 132S0154BOM OPTIONREF DESCCOMMENTS:TABLE_ALT_ITEMRADAR:9624625THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED9 OF 157 7 OF 48SHEET876543218765432144 40 13 44 13 44 13 44 13 44 13BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BID44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 40 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13DDR0_DQ&0& DDR0_DQ&1& DDR0_DQ&2& DDR0_DQ&3& DDR0_DQ&4& DDR0_DQ&5& DDR0_DQ&6& DDR0_DQ&7& DDR0_DQ&8& DDR0_DQ&9& DDR0_DQ&10& DDR0_DQ&11& DDR0_DQ&12& DDR0_DQ&13& DDR0_DQ&14& DDR0_DQ&15& DDR0_DQ&16& DDR0_DQ&17& DDR0_DQ&18& DDR0_DQ&19& DDR0_DQ&20& DDR0_DQ&21& DDR0_DQ&22& DDR0_DQ&23& DDR0_DQ&24& DDR0_DQ&25& DDR0_DQ&26& DDR0_DQ&27& DDR0_DQ&28& DDR0_DQ&29& DDR0_DQ&30& DDR0_DQ&31& DDR0_CA&0& DDR0_CA&1& DDR0_CA&2& DDR0_CA&3& DDR0_CA&4& DDR0_CA&5& DDR0_CA&6& DDR0_CA&7& DDR0_CA&8& DDR0_CA&9& DDR0_DM&0& DDR0_DM&1& DDR0_DM&2& DDR0_DM&3& DDR0_DQS_P&0& DDR0_DQS_N&0& DDR0_DQS_P&1& DDR0_DQS_N&1& DDR0_DQS_P&2& DDR0_DQS_N&2& DDR0_DQS_P&3& DDR0_DQS_N&3&B14 B13 D13 C12 D12 B11 C11 B10 C9 D9 B8 C8 B7 B6 C6 D7 B17 C17 B16 E17 D16 E16 C15 D15 E6 B5 C5 E5 C4 D4 B3 C3 G5 G6 H5 H6 J5 M5 M6 N6 P5 P6 E12 E9 C14 D6 A13 A12 A6 A7 A16 A15 A3 A4 P4 N4 J1 K1 G11 K6 J6 D10 M4DDR0_DQ0 DDR0_DQ1 DDR0_DQ2 DDR0_DQ3 DDR0_DQ4 DDR0_DQ5 DDR0_DQ6 DDR0_DQ7 DDR0_DQ8 DDR0_DQ9 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 DDR0_DQ14 DDR0_DQ15 DDR0_DQ16 DDR0_DQ17 DDR0_DQ18 DDR0_DQ19 DDR0_DQ20 DDR0_DQ21 DDR0_DQ22 DDR0_DQ23 DDR0_DQ24 DDR0_DQ25 DDR0_DQ26 DDR0_DQ27 DDR0_DQ28 DDR0_DQ29 DDR0_DQ30 DDR0_DQ31 DDR0_CA0 DDR0_CA1 DDR0_CA2 DDR0_CA3 DDR0_CA4 DDR0_CA5 DDR0_CA6 DDR0_CA7 DDR0_CA8 DDR0_CA9 DDR0_DM0 DDR0_DM1 DDR0_DM2 DDR0_DM3 DDR0_PDQS0 DDR0_NDQS0 DDR0_PDQS1 DDR0_NDQS1 DDR0_PDQS2 DDR0_NDQS2 DDR0_PDQS3 DDR0_NDQS3 DDR0_CK DDR0_CKB DDR0_CKE0 DDR0_CKE1 DDR0_VDDQ_CKE DDR0_CSN0 DDR0_CSN1 DDR0_VREF_DQ DDR0_ZQOMITU0600FCBGA (7 OF 12)H4GDDR1_DQ0 DDR1_DQ1 DDR1_DQ2 DDR1_DQ3 DDR1_DQ4 DDR1_DQ5 DDR1_DQ6 DDR1_DQ7 DDR1_DQ8 DDR1_DQ9 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15 DDR1_DQ16 DDR1_DQ17 DDR1_DQ18 DDR1_DQ19 DDR1_DQ20 DDR1_DQ21 DDR1_DQ22 DDR1_DQ23 DDR1_DQ24 DDR1_DQ25 DDR1_DQ26 DDR1_DQ27 DDR1_DQ28 DDR1_DQ29 DDR1_DQ30 DDR1_DQ31 DDR1_CA0 DDR1_CA1 DDR1_CA2 DDR1_CA3 DDR1_CA4 DDR1_CA5 DDR1_CA6 DDR1_CA7 DDR1_CA8 DDR1_CA9 DDR1_DM0 DDR1_DM1 DDR1_DM2 DDR1_DM3 DDR1_PDQS0 DDR1_NDQS0 DDR1_PDQS1 DDR1_NDQS1 DDR1_PDQS2 DDR1_NDQS2 DDR1_PDQS3 DDR1_NDQS3 DDR1_CK DDR1_CKB DDR1_CKE0 DDR1_CKE1 DDR1_VDDQ_CKE DDR1_CSN0 DDR1_CSN1 DDR1_VREF_DQ DDR1_ZQH2 H3 J3 J4 K2 L2 K4 K5 N2 P2 P3 R3 U3 T2 U2 R4 C2 D2 E2 E4 E3 F3 F4 G2 R6 T4 U4 V1 V2 V3 V4 V5 E15 F15 F14 E14 F13 E8 F8 F7 E7 F6 L5 N5 G4 R5 F1 G1 N1 M1 C1 D1 T1 R1 F11 F12 A10 A9 N7 F10 E13 L3 E11DDR1_DQ&0& DDR1_DQ&1& DDR1_DQ&2& DDR1_DQ&3& DDR1_DQ&4& DDR1_DQ&5& DDR1_DQ&6& DDR1_DQ&7& DDR1_DQ&8& DDR1_DQ&9& DDR1_DQ&10& DDR1_DQ&11& DDR1_DQ&12& DDR1_DQ&13& DDR1_DQ&14& DDR1_DQ&15& DDR1_DQ&16& DDR1_DQ&17& DDR1_DQ&18& DDR1_DQ&19& DDR1_DQ&20& DDR1_DQ&21& DDR1_DQ&22& DDR1_DQ&23& DDR1_DQ&24& DDR1_DQ&25& DDR1_DQ&26& DDR1_DQ&27& DDR1_DQ&28& DDR1_DQ&29& DDR1_DQ&30& DDR1_DQ&31& DDR1_CA&0& DDR1_CA&1& DDR1_CA&2& DDR1_CA&3& DDR1_CA&4& DDR1_CA&5& DDR1_CA&6& DDR1_CA&7& DDR1_CA&8& DDR1_CA&9& DDR1_DM&0& DDR1_DM&1& DDR1_DM&2& DDR1_DM&3& DDR1_DQS_P&0& DDR1_DQS_N&0& DDR1_DQS_P&1& DDR1_DQS_N&1& DDR1_DQS_P&2& DDR1_DQS_N&2& DDR1_DQS_P&3& DDR1_DQS_N&3&BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 4444 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI OUT OUT OUT35 8DDR2_DQ&0& DDR2_DQ&1& DDR2_DQ&2& DDR2_DQ&3& DDR2_DQ&4& DDR2_DQ&5& DDR2_DQ&6& DDR2_DQ&7& DDR2_DQ&8& DDR2_DQ&9& DDR2_DQ&10& DDR2_DQ&11& DDR2_DQ&12& DDR2_DQ&13& DDR2_DQ&14& DDR2_DQ&15& DDR2_DQ&16& DDR2_DQ&17& DDR2_DQ&18& DDR2_DQ&19& DDR2_DQ&20& DDR2_DQ&21& DDR2_DQ&22& DDR2_DQ&23& DDR2_DQ&24& DDR2_DQ&25& DDR2_DQ&26& DDR2_DQ&27& DDR2_DQ&28& DDR2_DQ&29& DDR2_DQ&30& DDR2_DQ&31& DDR2_CA&0& DDR2_CA&1& DDR2_CA&2& DDR2_CA&3& DDR2_CA&4& DDR2_CA&5& DDR2_CA&6& DDR2_CA&7& DDR2_CA&8& DDR2_CA&9& DDR2_DM&0& DDR2_DM&1& DDR2_DM&2& DDR2_DM&3& DDR2_DQS_P&0& DDR2_DQS_N&0& DDR2_DQS_P&1& DDR2_DQS_N&1& DDR2_DQS_P&2& DDR2_DQS_N&2& DDR2_DQS_P&3& DDR2_DQS_N&3& DDR2_CK_P DDR2_CK_N DDR2_CKE&0& 46 NC_DDR2_CKE&1& =PP1V2_S2R_H4 DDR2_CSN&0& NC_DDR2_CSN&1& PPVREF_DDR2_DQ_H4 H4G_DDR2_ZQAB2 AB3 AC2 AC4 AE2 AD3 AF2 AE3 AG3 AH2 AH3 AF4 AJ3 AJ2 AK3 AF5 Y2 W2 Y3 W4 Y4 AA3 AA5 AA4 AL2 AL3 AL4 AM2 AN2 AN3 AL5 AK5 AL6 AK6 AL7 AK7 AL8 AL11 AK11 AK12 AL12 AK13 AD4 AG4 AA6 AK4 AC1 AD1 AK1 AJ1 Y1 AA1 AN1 AM1 AM13 AM12 AR10 AR9 AE7 AK9 AK8 AE4 AL9DDR2_DQ0 DDR2_DQ1 DDR2_DQ2 DDR2_DQ3 DDR2_DQ4 DDR2_DQ5 DDR2_DQ6 DDR2_DQ7 DDR2_DQ8 DDR2_DQ9 DDR2_DQ10 DDR2_DQ11 DDR2_DQ12 DDR2_DQ13 DDR2_DQ14 DDR2_DQ15 DDR2_DQ16 DDR2_DQ17 DDR2_DQ18 DDR2_DQ19 DDR2_DQ20 DDR2_DQ21 DDR2_DQ22 DDR2_DQ23 DDR2_DQ24 DDR2_DQ25 DDR2_DQ26 DDR2_DQ27 DDR2_DQ28 DDR2_DQ29 DDR2_DQ30 DDR2_DQ31 DDR2_CA0 DDR2_CA1 DDR2_CA2 DDR2_CA3 DDR2_CA4 DDR2_CA5 DDR2_CA6 DDR2_CA7 DDR2_CA8 DDR2_CA9 DDR2_DM0 DDR2_DM1 DDR2_DM2 DDR2_DM3 DDR2_PDQS0 DDR2_NDQS0 DDR2_PDQS1 DDR2_NDQS1 DDR2_PDQS2 DDR2_NDQS2 DDR2_PDQS3 DDR2_NDQS3 DDR2_CK DDR2_CKB DDR2_CKE0 DDR2_CKE1 DDR2_VDDQ_CKE DDR2_CSN0 DDR2_CSN1 DDR2_VREF_DQ DDR2_ZQU0600FCBGA (8 OF 12)H4GOMITDDR3_DQ0 DDR3_DQ1 DDR3_DQ2 DDR3_DQ3 DDR3_DQ4 DDR3_DQ5 DDR3_DQ6 DDR3_DQ7 DDR3_DQ8 DDR3_DQ9 DDR3_DQ10 DDR3_DQ11 DDR3_DQ12 DDR3_DQ13 DDR3_DQ14 DDR3_DQ15 DDR3_DQ16 DDR3_DQ17 DDR3_DQ18 DDR3_DQ19 DDR3_DQ20 DDR3_DQ21 DDR3_DQ22 DDR3_DQ23 DDR3_DQ24 DDR3_DQ25 DDR3_DQ26 DDR3_DQ27 DDR3_DQ28 DDR3_DQ29 DDR3_DQ30 DDR3_DQ31 DDR3_CA0 DDR3_CA1 DDR3_CA2 DDR3_CA3 DDR3_CA4 DDR3_CA5 DDR3_CA6 DDR3_CA7 DDR3_CA8 DDR3_CA9 DDR3_DM0 DDR3_DM1 DDR3_DM2 DDR3_DM3 DDR3_PDQS0 DDR3_NDQS0 DDR3_PDQS1 DDR3_NDQS1 DDR3_PDQS2 DDR3_NDQS2 DDR3_PDQS3 DDR3_NDQS3 DDR3_CK DDR3_CKB DDR3_CKE0 DDR3_CKE1 DDR3_VDDQ_CKE DDR3_CSN0 DDR3_CSN1 DDR3_VREF_DQ DDR3_ZQAP7 AM7 AP8 AN8 AN9 AP10 AP11 AN11 AN12 AM10 AL10 AP13 AP14 AM14 AL14 AN14 AP4 AP3 AN4 AM4 AP5 AN5 AN6 AM5 AN15 AM15 AP16 AM16 AR18 AP17 AN17 AM17 AB5 AB6 AC5 AC6 AD5 AG5 AG6 AH6 AH5 AJ6 AM11 AL13 AM6 AK14 AR6 AR7 AR13 AR12 AR3 AR4 AR16 AR15 AH4 AJ4 AF1 AG1 AJ12 AE6 AD6 AM9 AE5DDR3_DQ&0& DDR3_DQ&1& DDR3_DQ&2& DDR3_DQ&3& DDR3_DQ&4& DDR3_DQ&5& DDR3_DQ&6& DDR3_DQ&7& DDR3_DQ&8& DDR3_DQ&9& DDR3_DQ&10& DDR3_DQ&11& DDR3_DQ&12& DDR3_DQ&13& DDR3_DQ&14& DDR3_DQ&15& DDR3_DQ&16& DDR3_DQ&17& DDR3_DQ&18& DDR3_DQ&19& DDR3_DQ&20& DDR3_DQ&21& DDR3_DQ&22& DDR3_DQ&23& DDR3_DQ&24& DDR3_DQ&25& DDR3_DQ&26& DDR3_DQ&27& DDR3_DQ&28& DDR3_DQ&29& DDR3_DQ&30& DDR3_DQ&31& DDR3_CA&0& DDR3_CA&1& DDR3_CA&2& DDR3_CA&3& DDR3_CA&4& DDR3_CA&5& DDR3_CA&6& DDR3_CA&7& DDR3_CA&8& DDR3_CA&9& DDR3_DM&0& DDR3_DM&1& DDR3_DM&2& DDR3_DM&3& DDR3_DQS_P&0& DDR3_DQS_N&0& DDR3_DQS_P&1& DDR3_DQS_N&1& DDR3_DQS_P&2& DDR3_DQS_N&2& DDR3_DQS_P&3& DDR3_DQS_N&3&BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44DC44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 1313 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 44 13 4444 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 1414 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44C44 13 44 13 44 13 44 1313 44 13 44 13 44 13 4444 14 44 14 44 14 44 1414 44 14 44 14 44 14 4444 40 13 44 40 13 44 13 44 40 13 44 13 44 13 44 13 44 1313 44 13 44 13 44 13 44 13 44 13 44 13 44 13 4444 14 44 14 44 14 44 14 44 14 44 14 44 14 44 1414 44 14 44 14 44 14 44 14 44 14 44 14 44 14 44B44 13 44 13 44 1344 13DDR0_CK_P OUT DDR0_CK_N OUT DDR0_CKE&0& OUT 46 NC_DDR0_CKE&1& 35 8 =PP1V2_S2R_H4 DDR0_CSN&0& OUT NC_DDR0_CSN&1& 46 PPVREF_DDR0_DQ_H4 45 8 H4G_DDR0_ZQDDR1_CK_P OUT DDR1_CK_N OUT DDR1_CKE&0& OUT NC_DDR1_CKE&1& 46 =PP1V2_S2R_H4 8 35 DDR1_CSN&0& OUT NC_DDR1_CSN&1& 46 PPVREF_DDR1_DQ_H4 8 H4G_DDR1_ZQ13 44 13 44 13 4444 14 44 14 44 1413 4444 14OUT46 45 845DDR3_CK_P OUT DDR3_CK_N OUT DDR3_CKE&0& OUT NC_DDR3_CKE&1& 46 =PP1V2_S2R_H4 8 35 DDR3_CSN&0& OUT NC_DDR3_CSN&1& 46 PPVREF_DDR3_DQ_H4 8 H4G_DDR3_ZQ14 44 14 44 14 44B14 44451R10202401C10200.22UF998-MM PT1C10210.22UF1R10212401R10222401% 1/20W MF 2 20120% 6.3V 2 X5R 0201120% 6.3V 2 X5R 02011% 1/20W MF 2 2011% 1/20W MF 2 201C10220.22UF1C10230.22UF1R1023424020% 6.3V 2 X5R 020120% 6.3V 2 X5R 02011% 1/20W MF 2 20135 9 8=PP1V2_VDDIOD_H4135 9 8=PP1V2_VDDIOD_H4135 9 8=PP1V2_VDDIOD_H4135 9 8=PP1V2_VDDIOD_H41AR10531.00K1NOSTUFFR10551.00K1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC10571NOSTUFFR10831.00K11% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1058NOSTUFFR10951.00K1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC10851NOSTUFF1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1095SYNC_MASTER=MIKEPAGE TITLESYNC_DATE=N/AAPPVREF_DDR0_DQ_H48 45PPVREF_DDR1_DQ_H48 45PPVREF_DDR2_DQ_H48 45PPVREF_DDR3_DQ_H48 45AP: DDRDRAWING NUMBER1R10541.00K1NOSTUFF VOLTAGE=0.6V11% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1054MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MMR10561.00K1NOSTUFF VOLTAGE=0.6V1NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1056MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MMR10841.00K1NOSTUFF VOLTAGE=0.6VNET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1084MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM1NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MMR10961.00K1NOSTUFF VOLTAGE=0.6V1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1096MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MMApple Inc.R051-.0SIZEDNET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MMREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED10 OF 157 8 OF 48SHEET87654321835 97654U0600321=PPVDD_SOC_H4U0600AA9 AA11 AA13 AA15 AA17 AB10 AB12 AB14 AB16 AC9 AC11 AD10 AE11 AF10 AF11 AF12 AG10 AG11 AG12 AG13 J13 J15 J17 J19 J21 J23 J25 J27 K12 K14 K16 K18 K20 K22 K24 K26 L9 L11 L13 L15 L17 L19 L21 L23 L25 L27 M10 M12 M14 M16 M18 M20 M22 M24 M26 N9 N11 N13 N15 N17 N19 N21 FCBGA (9 OF 12) OMIT35 7=PP3V0_IO_H41H4GDVDD VDD3800MACN23 N25 N27 P10 P12 P14 P16 P18 P20 P22 P24 P26 R9 R11 R13 R15 R17 R19 R21 R23 R25 R27 T10 T12 T14 T16 T18 T20 T22 T24 T26 U11 U13 U15 U17 U19 U21 U23 U25 U27 V10 V12 V14 V16 W9 W11 W13 W15 W17 Y10 Y12 Y14 Y16C114256PF1C11830.22UF1C11840.22UF5% 6.3V 2 NP0-C0G 0100520% 2 6.3V X5R 020120% 6.3V 2 X5R 0201FCBGA OMIT (10 OF 12) V8 VDDIO30_CFSB AF15 VDDIO30_DP_HPD AJ28 VDDIO30_GPIO_3V0 160MA M29 VDDIO30_USB11 N28 AA19 AA21 AA23 AA25 AA27 AB18 AB20 AB22 AB24 AB26 AC19 AC21 AC23 AC25 AC26 AC27 AD18 AD20 AD22 AD24 AD26 AE19 AE21 AE23 AE25 AE27 V18 V20 V22 V24 V26 W19 W21 W23 W25 W27 Y18 Y20 Y22 Y24 Y26H4G=PP1V2_VDDIOD_H48 3535=PPVDD_CPU_H4C11500.01UF1C115710UF1C115156PF1C1152 15% 6.3V NP0-C0G 2 0100510% 6.3V 2 X5R 0100520% 6.3V 2 X5R 6035% 6.3V NP0-C0G 2 0100556PFVDDIOD1000MAC1153 120% 4V X5R-CERM 2 06104.3UFC1154 120% 4V X5R-CERM 2 06104.3UFC11554.3UF1C11564.3UF1C1158 120% 4V X5R-CERM 2 061020% 4V X5R-CERM 2 061020% 4V X5R-CERM 2 06104.3UFVDD_CPU2300MAAA7 AB7 AC7 AD7 AF7 AG7 AH7 AJ7 AJ8 AJ9 AJ10 AJ11 G7 G8 G9 G10 G12 G13 G14 G15 G16 H7 J7 K7 L7 M7 P7 R7 Y8 AH20 AK20 AL19 AK30 AH29 AE29 AF29 AB29 AC29C119356PF1C11914.3UF1C119210UF15% 6.3V NP0-C0G 2 0100520% 4V X5R-CERM 2 061020% 6.3V 2 X5R 603DC11940.22UF1C960.22UF20% 6.3V X5R 2 02011C1197 10.22UF20% 6.3V X5R 2 0201C11900.22UF120% 6.3V X5R 2 02010.22UF20% 6.3V X5R 2 020120% 6.3V X5R 2 0201=PP1V8_VDDIOD_H415 35C11760.22UF1C11770.22UF120% 6.3V 2 X5R 020120% 6.3V 2 X5R 0201C114356PFC1159 10.22UF20% 6.3V X5R 2 0201C1160 10.22UF20% 6.3V X5R 2 0201C1161 10.22UF20% 6.3V X5R 2 02015% 6.3V 2 NP0-C0G 01005UART4 ?MA GPIO30-39 4MA SPI1 1MA I2C2 1MA ISP FLASH, SPI3 3MA FMI2-3_CEN 2MAVDDIOD0 VDDIOD1 VDDIOD2 VDDIOD3 VDDIOD4 VDDIOD5 VDDIOD6 VDDIOD7=PP3V0_VDDIOD_H4135CC11810.22UF1C11820.22UF1C114456PFNAND_IO_1V8FMI0-1 88MA20% 6.3V 2 X5R 020120% 6.3V 2 X5R 02015% 6.3V 2 NP0-C0G 01005FMI2-3 88MAC1162 10.22UF20% 6.3V X5R 2 0201C1163 10.22UF20% 6.3V X5R 2 0201C1164 10.22UF20% 6.3V X5R 2 0201C1165 10.22UF20% 6.3V X5R 2 0201C1166 10.22UF20% 6.3V X5R 2 0201R1100144MAVDDIO18_FUSE0_FSRC N29 VDDIO18_GPIO AJ17 AJ22 AJ25 VDDIO18_UART1_TXD0 AJ26 VDDIO18_UART2_TXD T8 VDDIO18_XO0 V2802=PP1V8_NAND_H4355% 1/20W MF 201VOLTAGE=1.8V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MMR11011NAND_IO_3V3 =PP3V3_NAND_H435025% 1/20W MF 20145 6PPIO_NAND_H411C11701UFC11711UF1C11721UF1C11730.22UF1C11740.22UF1C117510UF1C114556PF10% 6.3V 2 CERM 40210% 6.3V 2 CERM 40210% 6.3V 2 CERM 40220% 6.3V 2 X5R 020120% 6.3V 2 X5R 020120% 6.3V 2 CERM-X5R 0402-15% 6.3V 2 NP0-C0G 01005B=PP1V8_VDDIO18_H41B35C11980.22UF1C11990.22UF1C114656PF20% 2 6.3V X5R 020120% 2 6.3V X5R 02015% 6.3V 2 NP0-C0G 0100535 9=PPVDD_SOC_H4C110110UF1C112310UF1C1102 120% 4V X5R-CERM 2 061020% 6.3V X5R 2 60320% 6.3V X5R 2 6034.3UFC1103 120% 4V X5R-CERM 2 06104.3UFC1121 120% 4V X5R-CERM 2 06104.3UFC11224.3UF1C11244.3UF1C1100 120% 4V X5R-CERM 2 061020% 4V X5R-CERM 2 061020% 4V X5R-CERM 2 06104.3UFC1117 120% 4V X5R-CERM 2 06104.3UFTABLE_ALT_HEADPART NUMBER 138S0702ALTERNATE FOR PART NUMBER 138S0657BOM OPTIONREF DESCCOMMENTS:TABLE_ALT_ITEMQTY 17 RADAR:8837828C1100, C1121, C1154, C1191, C1721C1102, C1122, C1155, C1615,C1103, C1124, C1156, C1621,C1117, C1153, C1158, C1715,C11040.01UF1C11050.01UF1C11060.01UF1C1107 10.01UF10% 6.3V 2 X5R 01005C1125 10.01UF10% 6.3V 2 X5R 01005C11260.01UF1C114056PF1C1141 15% 6.3V NP0-C0G 2 0100510% 6.3V 2 X5R 0100510% 6.3V 2 X5R 0100510% 6.3V 2 X5R 0100510% 6.3V 2 X5R 010055% 6.3V NP0-C0G 2 0100556PFAC1108 10.22UF20% 6.3V X5R 2 0201SYNC_MASTER=MIKEPAGE TITLESYNC_DATE=N/AAAP: POWERDRAWING NUMBERC11090.22UF1C11100.22UF1C1111 10.22UF20% 6.3V X5R 2 0201C1129 10.22UF20% 6.3V X5R 2 0201C1130 10.22UF20% 6.3V X5R 2 0201C11310.22UF1C11320.22UF1C1133 10.22UF20% 6.3V X5R 2 0201C1134 10.22UF20% 6.3V X5R 2 0201C11350.22UF1C11360.22UF1C1137 10.22UF20% 6.3V X5R 2 0201C11380.22UF1R20% 6.3V X5R 2 020120% 6.3V X5R 2 020120% 6.3V X5R 2 020120% 6.3V X5R 2 020120% 6.3V X5R 2 020120% 6.3V X5R 2 020120% 6.3V X5R 2 0201Apple Inc.NOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED051-.0SIZEDREVISION BRANCH PAGE11 OF 157 9 OF 48SHEET876543218BOOT CONFIG ID35 10 7 47=PP1V8_H4NOSTUFF1654JTAG321NOSTUFF1R120010K1R120110K1R120210KR120310KBOOT_CONFIG[3] (GPIO29) BOOT_CONFIG[2] (GPIO28)5BOOT_CONFIG_3 BOOT_CONFIG_2 BOOT_CONFIG_1 BOOT_CONFIG_05% 1/20W MF 2 2015% 1/20W MF 2 2015% 1/20W MF 2 2015% 1/32W MF 2 01005I2C PULL-UPSJTAG_DAP42 4DEVELOPMENT_JTAG_TAPR1212INJTAG_AP_TDO10.00 20% 1/32W MF 01005VIDEO_EMI_C_YOUT11 27 43R121011002JTAG_AP_SEL5OUT4DEVELOPMENT_JTAG_TAPDBOOT_CONFIG[1] (GPIO25) BOOT_CONFIG[0] (GPIO18)5R1213JTAG_DAP45 26 24 42 45OUTJTAG_AP_TDI10.00 20% 1/32W MF 01005VIDEO_EMI_Y_PRDIN11 27 43PP3V0_SENSOR_FLTR121111002JTAG_AP_TRST_LOUT4 10 42 45BOOT_CONFIG[3-0] 10 FMI0/1 2/2 CS FMI0/1 4/4 CS FMI0/1 4/4 CS WITH TEST 1. 2. 3.S/W READ FLOW SET GPIO AS INPUT DISABLE PU AND ENABLE PD READ35 10 7 4=PP1V8_H41DEVELOPMENT_JTAG_TAPR2 1R41.00K5% 1/32W MF 2 01005142 37 22 19 5 42 37 22 19 5I2C0_SDA_1V8 I2C0_SCL_1V8 I2C1_SDA_1V8 I2C1_SCL_1V85% 1/32W MF 2 010051.00K5% 1/32W MF 2 010051.00K5% 1/32W MF 2 010051.00KR61.00K5% 1/32W MF 2 01005R121415% 1/32W MF 2 010051.00K45 42 10 4OUTJTAG_AP_TRST_L0.00 20% 1/32W MF 01005VIDEO_EMI_CVBS_PBIN11 27 4342 25 5BOARD ID35 10 7 42-WIRE DAP DEVELOPMENT_JTAG JTAG_DAPSCAN DUMP DEVELOPMENT_JTAG DEVELOPMENT_JTAG_TAPPRODUCTION JTAG_DAP42 25 5=PP1V8_H4J2A1J2DEV42 25 24 42 25 24R5 1R120610K5% 1/32W MF 2 01005I2C2_SDA_3V0_ALS I2C2_SCL_3V0_ALSBOARD_ID[3] BOARD_ID[2] BOARD_ID[1] BOARD_ID[0]5BOARD_ID_3 BOARD_ID_2 BOARD_ID_1 BOARD_ID_05% 1/32W MF 2 0100510K5% 1/32W MF 2 0100510K55CBOARD_ID[3-0] 10 01 J1 AP J1 DEV J2 AP J2 DEV J2A AP J2A DEV 1. 2. 3.S/W READ FLOW SET GPIO AS INPUT DISABLE PU AND ENABLE PD READCR12601100K 25% 1/32W MF 01005AP_TESTMODE4NOSTUFFBOARD REVISION5 5 5XW1200NOSTUFFSHORT- SHORT- SHORT-AP_TST_STPCLK4GPIO42_BRD_REV2 GPIO41_BRD_REV1 GPIO40_BRD_REV01XW1201NOSTUFFAP_FAST_SCAN_CLK AP_HOLD_RESET4XW12024R R120910K5% 1/20W MF 2 2011NOSTUFF 1 5% 1/20W MF 2 201R1261110K5% 1/20W MF 2 20110K10K2USB_AP_VBUS145% 1/32W MF 01005BBRD_REV[2-0] 000 001 010 011 100 PROTO PROTO PROTO PROTO EVT 0 1 LOCAL 1 CHINA 2 1. 2. 3. S/W READ FLOW SET GPIO AS INPUT ENABLE PU AND DISABLE PD READBFOR REFERENCEBOOT_CONFIG[3:0] 0000 SPI0 0001 SPI1 0010 SPI0 W/TEST 0011 SPI1 W/TEST 0100 FMI0 2CS 0101 FMI0 4CS 0110 FMI0 4CS W/TEST 0111 RESERVED 1000 FMI1 2 CS 1001 FMI1 4 CS 1010 FMI1 4CS W/TEST CURRENT SETTING -& 1100 FMI0/1 2/2 CS 11 FMI0/1 4/4 CS FMI0/1 4/4 CS W/TEST RESERVEDASYNC_MASTER=ALEXPAGE TITLESYNC_DATE=N/AAAP: MISC & ALIASESDRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED12 OF 157 10 OF 48SHEET8765432187654321DD=PP3V2_S2R_USBMUX35~15MA =PP3V0_VIDEO_BUF35C130156PF1C130010% 6.3V X5R 20115% 6.3V NP0-C0G 2 01005 10.1UF2C13700.1UF10% 2 6.3V X5R 201VA_0 C1 VA_1 C4VDL D2VDH E2PORT_DOCK_VIDEO_AMP_ENIN5NOTE:PLACE R0960-62 NEAR U0900JTAG_DAPCYIN CVBSIN CIN43 7 43 7 43 7THS7380IZSYRUCSPCRITICALIN IN IN IN OUT BI BIU1300R1372100K1R1360752 1% 1/20W MF 2011VID_EN C3 CH.1_OUT A2 CH.2_OUT A1 CH.3_OUT B1 BUF_Y_PR BUF_CVBS_PB 43 BUF_C_Y43 435% 1/32W MF 01005 2VIDEO_EMI_Y_PR OUT10 27 43CJTAG_DAPDAC_AP_OUT3 DAC_AP_OUT2 DAC_AP_OUT1 UART0_MUX_TXD UART0_MUX_RXD USB_BB_D_P USB_BB_D_NA3 A4 B4 D4 E4 F3 F4CH.1_IN CH.2_IN CH.3_IN TX_VLOW RX_VLOW USB_D+ USB_D-R1361752 1% 1/20W MF 2011VIDEO_EMI_CVBS_PBOUT10 27 4342 15 42 15RX_VHIGH/USB_2D+ E1 TX_VHIGH/USB_2D- D1 USB_1D+ F2 USB_1D- F1 SEL C2USB11_ACC_RX_P USB11_ACC_TX_NUSB11_MUX_D0_P USB11_MUX_D0_N DOCK_BB_ENBI BI IN4 42 4 42OUT IN27 42 27 42JTAG_DAPR1362752 1% 1/20W MF 20142 30 42 301VIDEO_EMI_C_YOUT10 27 43371R13151.00MAGND B2 B3DGND D3 E31R1320100K5% 1/32W MF 2 010055% 1/32W MF 2 01005NOTE: DOCK_BB_EN = 1: DOCK_BB_EN = 0:BB USB &-& DOCK SERIAL BB USB &-& H4P FS USB H4P UART0 &-& DOCK SERIALBTABLE_ALT_HEADBPART NUMBER 343S0539 ALTERNATE FOR PART NUMBER 343S0520 BOM OPTION REF DES COMMENTS:TABLE_ALT_ITEMU1300RADAR:9009078ASYNC_MASTER=CHOPINPAGE TITLESYNC_DATE=12/10/2010AAP: VIDEO BUFFER,BB USB MUXESDRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED13 OF 157 11 OF 48SHEET8765432187654321R1400 NAND_IO_1V8102=PP1V8_NAND355% 1/20W MF 201R1401NAND_IO_3V3 =PP3V3_NAND35 12 12 35D135 1202=PP3V3_NAND5% 1/20W MF 201=PP3V3_NANDDVOLTAGE=1.8V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM1C14050.22UF1C14060.22UF1C140010UF1C140110UF1C140210UF1C14040.1UFPPVCCQ_NANDVOLTAGE=1.8V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM12 451C142010UF1C142110UF1C142210UF1C14240.1UF1PPVCCQ_NAND12 4520% 6.3V 2 X5R 020120% 6.3V 2 X5R 020120% 6.3V 2 CERM-X5R 0402-120% 6.3V 2 CERM-X5R 0402-120% 6.3V 2 CERM-X5R 0402-110% 6.3V 2 X5R 2011C110.1UF20% 2 6.3V CERM 402-LF145PPVDDI_NAND_U1400VOLTAGE=3.3V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM10% 2 6.3V X5R 2012.2UFC141210UF1C14130.22UF1C14140.22UF120% 2 6.3V CERM-X5R 0402-120% 2 6.3V CERM-X5R 0402-120% 2 6.3V CERM-X5R 0402-110% 2 6.3V X5R 20120% 6.3V 2 CERM-X5R 0402-120% 6.3V 2 X5R 020120% 6.3V 2 X5R 0201C14250.22UF1C14260.22UFPPVDDI_NAND_U14101C31 1 C14320.1UF20% 2 6.3V CERM 402-LF11C14511.0UF1C14501.0UF20% 2 6.3V X5R 020120% 2 6.3V X5R 0201C14711.0UF1C14701.0UFOB8N1 N7 OC8 OD8 OE0 OF8 G0 OA8B6 F2 M6OB8VDDI FMI0_AD&0& FMI0_AD&1& FMI0_AD&2& FMI0_AD&3& FMI0_AD&4& FMI0_AD&5& FMI0_AD&6& FMI0_AD&7& FMI1_AD&0& FMI1_AD&1& FMI1_AD&2& FMI1_AD&3& FMI1_AD&4& FMI1_AD&5& FMI1_AD&6& FMI1_AD&7& G3 H2 J3 K2 L5 K6 J5 H6 G1 J1 L1 N3 N5 L7 J7 G7 IO0-0 IO1-0 IO2-0 IO3-0 IO4-0 IO5-0 IO6-0 IO7-0 IO0-1 IO1-1 IO2-1 IO3-1 IO4-1 IO5-1 IO6-1 IO7-1VCC OMITVCCQR1455CE0* CLE0 ALE0 WE0* A5 A3 C1 E3 FMI0_CE0_L FMI0_CLE FMI0_ALE FMI0_WE_L1 IN IN IN IN6 44 6 12 44 6 12 44 6 12 44VDDI FMI0_AD&0& FMI0_AD&1& FMI0_AD&2& FMI0_AD&3& FMI0_AD&4& FMI0_AD&5& FMI0_AD&6& FMI0_AD&7& FMI1_AD&0& FMI1_AD&1& FMI1_AD&2& FMI1_AD&3& FMI1_AD&4& FMI1_AD&5& FMI1_AD&6& FMI1_AD&7& G3 H2 J3 K2 L5 K6 J5 H6 G1 J1 L1 N3 N5 L7 J7 G7 IO0-0 IO1-0 IO2-0 IO3-0 IO4-0 IO5-0 IO6-0 IO7-0 IO0-1 IO1-1 IO2-1 IO3-1 IO4-1 IO5-1 IO6-1 IO7-1VCC OMIT44 12 6 44 12 6 44 12 6 44 12 6BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BIU1400LGAXXNM-XGBX8-MLC-PPN1.5-ODPC44 12 6 44 12 6XXNM-XGBX8-MLC-PPN1.5-ODP5% 1/32W MF 2 01005100K44 12 6 44 12 6 44 12 6BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BIN1 N7 OC8 OD8 OE0 OF8 G0 OA820% 2 6.3V X5R 0201-MUR20% 2 6.3V X5R 0201-MUR20% 2 6.3V X5R 0201-MUR20% 2 6.3V X5R 0201-MURVOLTAGE=3.3V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3MM10% 2 6.3V X5R 2012.2UF20% 6.3V 2 CERM-X5R 0402-110UFC14330.22UF1C14340.22UF20% 6.3V 2 X5R 020120% 6.3V 2 X5R 0201B6 F2 M6VCCQU1410LGA44 12 6 44 12 6 44 12 6 44 12 6CE0* CLE0 ALE0 WE0*A5 A3 C1 E3FMI0_CE1_L FMI0_CLE FMI0_ALE FMI0_WE_LIN IN IN IN6 44 6 12 44 6 12 44 6 12 44R14751100KRE0 B4 RE0* C7 DQS0 H4 DQS0* F4 R/B0* E5 CE1* CLE1 ALE1 WE1* C5 C3 D2 E1NC44 12 6FMI0_RE_N FMI0_DQS_PIN IN6 12 4444 12 6 44 12 6RE0 B4 RE0* C7 DQS0 H4 DQS0* F4 R/B0* E5 CE1* CLE1 ALE1 WE1* C5 C3 D2 E1NC5% 1/32W MF 01005 2CFMI0_RE_N FMI0_DQS_PIN IN6 12 446 12 44 44 12 6 44 12 644 12 6 44 12 6 44 12 6 44 12 6 44 12 6 44 12 6 44 12 6 44 12 66 12 44NCNAND_SLOT0_RDYBSY_L FMI1_CE0_L FMI1_CLE FMI1_ALE FMI1_WE_LIN IN IN IN6 44 6 12 44 6 12 44 6 12 44NCNAND_SLOT1_RDYBSY_L FMI1_CE1_L FMI1_CLE FMI1_ALE FMI1_WE_LIN IN IN IN6 44 6 12 44 6 12 44 6 12 4444 12 6 44 12 6 44 12 6 44 12 6 44 12 6 44 12 6RE1 D4 RE1* D6 DQS1 M4 DQS1* K4 R/B1* E7 VREF G5NCFMI1_RE_N FMI1_DQS_PIN IN6 12 44RE1 D4 RE1* D6 DQS1 M4 DQS1* K4 R/B1* E7 VREF G5NCFMI1_RE_N FMI1_DQS_PIN IN6 12 446 12 446 12 44NCLEAVE VREF AS TP FOR MLB TP_VREF_SLOT0 FMI_ZQ_U14001NCLEAVE VREF AS TP FOR MLB TP_VREF_SLOT1 FMI_ZQ_U14101FMI_TCKC_U1400 OA0 TCKC OB0 TMSC FMI_TMSC_U1400ZQ A1 VSS B2 F6 L3 VSSQ A7 M2 OC0 OD0 OE8 OF0 G8R1454243FMI_TCKC_U1410 OA0 TCKC OB0 TMSC FMI_TMSC_U1410ZQ A1 VSS B2 F6 L3 VSSQ A7 M2 OC0 OD0 OE8 OF0 G8BR1474243NOSTUFF1NOSTUFF1R14521KR14531K1% 1/20W MF 2 201NOSTUFF1NOSTUFF1R14721KR14731K1% 1/20W MF 2 201B5% 1/20W MF 2 2015% 1/20W MF 2 2015% 1/20W MF 2 2015% 1/20W MF 2 201TEST POINTSDO NOT PLACE IN NAND SINGLE PCS SHIELD CAN AREA44 12 6 44 12 6 44 12 6 44 12 6 44 12 6FMI0_AD&0& FMI0_ALE FMI0_CLE FMI0_RE_N FMI0_WE_L1 TP 1 TP 1 TP 1 TP 1 TPTP1400 TP1401 TP1402 TP1403 TP140444 12 6 44 12 6 44 12 6 44 12 6 44 12 6FMI1_AD&0& FMI1_ALE FMI1_CLE FMI1_RE_N FMI1_WE_L1 TP 1 TP 1 TP 1 TP 1 TPTP1405 TP1406 TP1407 TP1408 TP1409ASYNC_MASTER=MIKEPAGE TITLESYNC_DATE=N/AANANDDRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED14 OF 157 12 OF 48SHEET876543218744 8 44 8 44 8 44 8 44 86DDR1_CA&0& DDR1_CA&1& DDR1_CA&2& DDR1_CA&3& DDR1_CA&4& DDR1_CA&5& DDR1_CA&6& DDR1_CA&7& DDR1_CA&8& DDR1_CA&9& DDR1_CK_P DDR1_CK_N DDR1_CKE&0& T15 U15 U14 V14 T13 T9 U9 U8 V8 T7 CA0_1 CA1_1 CA2_1 CA3_1 CA4_1 CA5_1 CA6_1 CA7_1 CA8_1 CA9_1 OMIT CA0_2 CA1_2 CA2_2 CA3_2 CA4_2 CA5_2 CA6_2 CA7_2 CA8_2 CA9_2 G16 G17 H17 H18 J16 N16 N17 P17 P18 R165DDR0_CA&0& DDR0_CA&1& DDR0_CA&2& DDR0_CA&3& DDR0_CA&4& DDR0_CA&5& DDR0_CA&6& DDR0_CA&7& DDR0_CA&8& DDR0_CA&9& DDR0_CK_P DDR0_CK_N DDR0_CKE&0&8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 35 144321H4G-DRAMBGA SYM 1 OF 2U1600XXXMB=PP1V2_S2R_DDR35 14 1344 8 44 81R16052.21KD1NOSTUFF44 8 44 8 44 8=PP1V8_S2R_DDR1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1660C160110UF1C1602 11UF10% 6.3V CERM 2 402C1603 11UF10% 6.3V CERM 2 402C16040.01UF1C1605 10.01UF10% 6.3V X5R 2 0100544 8 44 813 44 45VDD1PPVREF_DDR0_CA144 8U12 CK_1 U11 CKB_1 V13 CKE_1CK_2 K17 CKB_2 L17 CKE_2 J188 44 8 44 8 4420% 6.3V X5R 2 60310% 6.3V X5R 2 01005R16062.21K1NOSTUFF VOLTAGE=0.6V1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1650MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MMNET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM44 8DDR1_CSN&0&U13 CSB_1CSB_2 J17DDR0_CSN&0&C1606 18 440.22UFC1607 10.22UF20% 6.3V X5R 2 0201C1608 10.22UF20% 6.3V X5R 2 0201C1609 15% 6.3V NP0-C0G 2 0100520% 6.3V X5R 2 020156PF44 8 44 8 44 8=PP1V2_S2R_DDR35 14 1344 8DDR1_DM&0& DDR1_DM&1& DDR1_DM&3& DDR1_DM&2& DDR1_DQ&0& DDR1_DQ&1& DDR1_DQ&2& DDR1_DQ&3& DDR1_DQ&4& DDR1_DQ&5& DDR1_DQ&6& DDR1_DQ&7& DDR1_DQ&8& DDR1_DQ&9& DDR1_DQ&10& DDR1_DQ&11& DDR1_DQ&12& DDR1_DQ&14& DDR1_DQ&13& DDR1_DQ&15& DDR1_DQ&24& DDR1_DQ&25& DDR1_DQ&26& DDR1_DQ&27& DDR1_DQ&28& DDR1_DQ&29& DDR1_DQ&30& DDR1_DQ&31& DDR1_DQ&16& DDR1_DQ&17& DDR1_DQ&18& DDR1_DQ&19& DDR1_DQ&20& DDR1_DQ&21& DDR1_DQ&22& DDR1_DQ&23& DDR1_DQS_P&0& DDR1_DQS_N&0& DDR1_DQS_P&1& DDR1_DQS_N&1& DDR1_DQS_P&3& DDR1_DQS_N&3& DDR1_DQS_P&2& DDR1_DQS_N&2& PPVREF_DDR1_CA PPVREF_DDR1_DQ44C12 B10 B16 D7 C15 D15 B14 C14 D14 E14 B13 C13 C9 D9 B8 C8 D8 E8 B7 C7 B18 C18 D18 E18 B17 D17 E17 E16 B6 B5 C5 D5 B4 C4 B3 C3DM0_1 DM1_1 DM2_1 DM3_1 DQ0_1 DQ1_1 DQ2_1 DQ3_1 DQ4_1 DQ5_1 DQ6_1 DQ7_1 DQ8_1 DQ9_1 DQ10_1 DQ11_1 DQ12_1 DQ13_1 DQ14_1 DQ15_1 DQ16_1 DQ17_1 DQ18_1 DQ19_1 DQ20_1 DQ21_1 DQ22_1 DQ23_1 DQ24_1 DQ25_1 DQ26_1 DQ27_1 DQ28_1 DQ29_1 DQ30_1 DQ31_1DM0_2 DM1_2 DM2_2 DM3_2 DQ0_2 DQ1_2 DQ2_2 DQ3_2 DQ4_2 DQ5_2 DQ6_2 DQ7_2 DQ8_2 DQ9_2 DQ10_2 DQ11_2 DQ12_2 DQ13_2 DQ14_2 DQ15_2 DQ16_2 DQ17_2 DQ18_2 DQ19_2 DQ20_2 DQ21_2 DQ22_2 DQ23_2 DQ24_2 DQ25_2 DQ26_2 DQ27_2 DQ28_2 DQ29_2 DQ30_2 DQ31_2K3 M2 G4 T2 G3 G2 H5 H4 H3 H2 J3 J2 N4 N3 P5 P4 P3 P2 R4 R3 B2 C2 D3 D2 E4 E3 E2 F2 T5 U5 U4 U2 V5 V4 V3 V2DDR0_DM&0& DDR0_DM&1& DDR0_DM&3& DDR0_DM&2& DDR0_DQ&0& DDR0_DQ&1& DDR0_DQ&2& DDR0_DQ&3& DDR0_DQ&4& DDR0_DQ&5& DDR0_DQ&6& DDR0_DQ&7& DDR0_DQ&8& DDR0_DQ&14& DDR0_DQ&10& DDR0_DQ&11& DDR0_DQ&12& DDR0_DQ&13& DDR0_DQ&9& DDR0_DQ&15& DDR0_DQ&24& DDR0_DQ&25& DDR0_DQ&26& DDR0_DQ&28& DDR0_DQ&27& DDR0_DQ&29& DDR0_DQ&30& DDR0_DQ&31& DDR0_DQ&16& DDR0_DQ&22& DDR0_DQ&19& DDR0_DQ&18& DDR0_DQ&20& DDR0_DQ&17& DDR0_DQ&21& DDR0_DQ&23& DDR0_DQS_P&0& DDR0_DQS_N&0& DDR0_DQS_P&1& DDR0_DQS_N&1& DDR0_DQS_P&3& DDR0_DQS_N&3& DDR0_DQS_P&2& DDR0_DQS_N&2& PPVREF_DDR0_CA PPVREF_DDR0_DQ448 44 8 44 8 44 8 44A2 B1 B11 F17 L2 M16 T10 U18 V17 V6 W17 U19 E11 E19 L5 M18 U17 T18 V10 V16 V18 W5 W16 W19 W18 V19 A3 T19 H1 M1 W3 E1 U1 B12 D4 U3 A14 C17 C19 A10 A17 J5 K2 A8 N2 R5 A13 E10 E15 P1VDD1_0 VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 VDD1_10 VDD1_11 VDD2_1 VDD2_2 VDD2_3 VDD2_4 VDD2_5 VDD2_6 VDD2_7 VDD2_8 VDD2_9 VDD2_10 VDD2_11 VDD2_12 VDD2_13 VDD2_14 VDD2_15 VDD2_16 VDDQ27 VDDQ32 VDDQ31 VDDQ VDDQ1 VDDQ3 VDDQ6 VDDQ30 VDDQ23 VDDQ25 VDDQ26 VDDQ22 VDDQ34 VDDQ16 VDDQ17 VDDQ21 VDDQ19 VDDQ20 VDDQ24 VDDQ28 VDDQ29 VDDQ33 VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5 VDDCA6 VDDCA7 VDDCA8 VDDCA9 VDDCA10H4G-DRAMXXXMBBGA SYM 2 OF 2U1600OMITVSS0 VSS55 VSS2 VSS3 VSS4 VSS49 VSS6 VSS7 VSS9 VSS10 VSS1 VSS12 VSS13 VSS51 VSS52 VSS50 VSS18 VSS48 VSS20 VSS53 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS47 VSS32 VSS33 VSS34 VSS35 VSS36 VSS54 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46A16 A19 A4 A6 B15 C1 B9 C11 D1 D19 A1 E12 E13 G5 T16 E7 F16 B19 G18 V1 J1 K18 K5 L18 L3 M5 N18 N5 A18 R18 R2 T1 T17 U16 W2 U6 V11 V12 V15 T6 V9 W1 W4D=PP1V2_S2R_DDR35 14 131R16512.21K144 88 40 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 40 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 35 14 13C16100.22UF1C1611 10.22UF20% 6.3V X5R 2 0201C1612 10.22UF20% 6.3V X5R 2 0201C1613 10.22UF20% 6.3V X5R 2 0201DDR_1PPVREF_DDR1_CA13 44 4544 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8C1614 110UF20% 6.3V X5R 2 60311R16522.21K1NOSTUFF VOLTAGE=0.6VC1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1652MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MMNET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM20% 4V X5R-CERM 2 06101UFC1617 11UF10% 6.3V CERM 2 4020.01UF10% 6.3V CERM 2 40210% 10V X5R 2 2015% 6.3V NP0-C0G 2 0100556PFVSS44 8C16 4.3UFC1618 1C1619 1VDD21% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC166144 8 44 8 44 8DDR_2NOSTUFF44 820% 6.3V X5R 2 0201C=PP1V2_VDDQ_DDRC1623 15% 6.3V NP0-C0G 2 0100535 14 13=PP1V2_VDDQ_DDR144 8 44 856PFC1620 110UF20% 6.3V 2 X5R 603C1621 120% 4V X5R-CERM 2 06104.3UFC1624 10.22UF20% 6.3V 2 X5R 0201C1625 10.22UF20% 6.3V 2 X5R 0201C220.22UF20% 6.3V 2 X5R 020110.01UFR16531.00K1NOSTUFF1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC166244 8 44 8 44 8 44 8 44 810% 6.3V 2 X5R 01005PPVREF_DDR0_DQ13 44 4544 8 44 8 44 8 44 8 44 8 44 8 44 8 44 81R16541.00K1NOSTUFF VOLTAGE=0.6V1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1654MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MMNET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM44 8 44 8D13 DQS0_1 D12 DQSB0_1 D10 DQS1_1 C10 DQSB1_1 C16 DQS2_1 D16 DQSB2_1 D6 DQS3_1 C6 DQSB3_1 U10 VREFCA_1 D11 VREFDQ_1 U7 ZQ_1DQS0_2 J4 DQSB0_2 K4 DQS1_2 M4 DQSB1_2 M3 DQS2_2 F4 DQSB2_2 F3 DQS3_2 T3 DQSB3_2 T4 VREFCA_2 M17 VREFDQ_2 L4 ZQ_2 R178 40 44 8 40 44VDDQB35 14 13=PP1V2_VDDQ_DDR144 8 44 88 44 8 40 44 35 14 13=PP1V2_S2R_DDRR16551.00K1NOSTUFF10% 6.3V 2 X5R 0100544 88 4444 88 44 8 4420% 6.3V X5R 2 60310% 6.3V CERM 2 40210% 6.3V CERM 2 40210% 6.3V X5R 2 0100510% 6.3V X5R 2 01005PPVREF_DDR1_DQ13 44 4544 81R16561.00K1NOSTUFF VOLTAGE=0.6V1% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1656MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM45 44 13 45 44 1313 44 45 13 44 45NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MMC1632 10.22UF20% 6.3V X5R 2 0201C1633 10.22UF20% 6.3V X5R 2 0201C1634 10.22UF20% 6.3V X5R 2 0201C1635 15% 6.3V NP0-C0G 2 0100556PFDDR1_ZQDDR0_ZQ1R16202401R16212401% 1/20W MF 2 2011% 1/20W MF 2 201AVDDCA1% 1/32W MF 2 010050.01UFC166344 88 44C162710UF1C16281UF1C16291UF1C16300.01UF1C16310.01UF1F18 H16 K16 L16 P16 T11 T12 T14 V7 T8BSYNC_MASTER=MIKEPAGE TITLESYNC_DATE=06/21/2010ADDR 0 AND 1DRAWING NUMBERApple Inc.R051-.0SIZEDREVISION BRANCH PAGENOTICE OF PROPRIETARY PROPERTY:THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED16 OF 157 13 OF 48SHEET876543218765432144 8 44 8 35 14 13=PP1V2_S2R_DDR144 8 44 8D1% 1/32W MF 2 010052.21K110% 6.3V 2 X5R 010050.01UFC1760VDD1R1705NOSTUFF44 8 44 8 44 8 44 8 44 8 44 8DDR3_CA&0& DDR3_CA&1& DDR3_CA&2& DDR3_CA&3& DDR3_CA&4& DDR3_CA&5& DDR3_CA&6& DDR3_CA&7& DDR3_CA&8& DDR3_CA&9& DDR3_CK_P DDR3_CK_N DDR3_CKE&0&T15 U15 U14 V14 T13 T9 U9 U8 V8 T7CA0_1 CA1_1 CA2_1 CA3_1 CA4_1 CA5_1 CA6_1 CA7_1 CA8_1 CA9_1H4G-DRAMBGA SYM 1 OF 2U1700XXXMBOMITCA0_2 CA1_2 CA2_2 CA3_2 CA4_2 CA5_2 CA6_2 CA7_2 CA8_2 CA9_2G16 G17 H17 H18 J16 N16 N17 P17 P18 R16DDR2_CA&0& DDR2_CA&1& DDR2_CA&2& DDR2_CA&3& DDR2_CA&4& DDR2_CA&5& DDR2_CA&6& DDR2_CA&7& DDR2_CA&8& DDR2_CA&9& DDR2_CK_P DDR2_CK_N DDR2_CKE&0&8 44 35 13 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44 8 44=PP1V8_S2R_DDRC170110UF1C17021UF1C1703 11UF10% 6.3V CERM 2 402C17040.01UF1C17050.01UF120% 6.3V X5R 2 60310% 6.3V CERM 2 40210% 6.3V X5R 2 0100510% 6.3V X5R 2 01005PPVREF_DDR2_CA14 45C17060.22UF11R17062.21K1NOSTUFF VOLTAGE=0.6V44 8 44 8 44 81% 1/32W MF 2 0100510% 6.3V 2 X5R 010050.01UFC1750MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MMNET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MMU12 CK_1 U11 CKB_1 V13 CKE_1CK_2 K17 CKB_2 L17 CKE_2 J18C1707 10.22UF20% 6.3V 2 X5R 0201C1708 10.22UF20% 6.3V 2 X5R 0201C170956PF18 44 8 44 8 4420% 6.3V 2 X5R 02015% 6.3V NP0-C0G 2 01005A2 B1 B11 F17 L2 M16 T10 U18 V17 V6 W17 U19 E11 E19 L5 M18 U17 T18 V10 V16 V18 W5 W16 W19 W18 V19 A3 T19 H1 M1 W3 E1 U1 B12 D4 U3 A14 C17 C19 A10 A17 J5 K2 A8 N2 R5 A13 E10 E15 P1VDD1_0 VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 VDD1_10 VDD1_11 VDD2_1 VDD2_2 VDD2_3 VDD2_4 VDD2_5 VDD2_6 VDD2_7 VDD2_8 VDD2_9 VDD2_10 VDD2_11 VDD2_12 VDD2_13 VDD2_14 VDD2_15 VDD2_16 VDDQ27 VDDQ32 VDDQ31 VDDQ VDDQ1 VDDQ3 VDDQ6 VDDQ30 VDDQ23 VDDQ25 VDDQ26 VDDQ22 VDDQ34 VDDQ16 VDDQ17 VDDQ21 VDDQ19 VDDQ20 VDDQ24 VDDQ28 VDDQ29 VDDQ33 VDDCA1 VDDCA2 VDDCA3 VDDCA4 VDDCA5 VDDCA6 VDDCA7 VDDCA8 VDDCA9 VDDCA10H4G-DRAMXXXMBBGA SYM 2 OF 2U1700OMITVSS0 VSS55 VSS2 VSS3 VSS4 VSS49 VSS6 VSS7 VSS9 VSS10 VSS1 VSS12 VSS13 VSS51 VSS52 VSS50 VSS18 VSS48 VSS20 VSS53 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS47 VSS32 VSS33 VSS34 VSS35 VSS36 VSS54 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46A16 A19 A4 A6 B15 C1 B9 C11 D1 D19 A1 E12 E13 G5 T16 E7 F16 B19 G18 V1 J1 K18 K5 L18 L3 M5 N18 N5 A18 R18 R2 T1 T17 U16 W2 U6 V11 V12 V15 T6 V9 W1 W4D=PP1V2_S2R_DDR44 8DDR3_CSN&0&U13 CSB_1CSB_2 J17DDR2_CSN&0&35 14 13 8 44C1710 10.22UF20% 6.3V X5R 2 0201C1711 10.22UF20% 6.3V X5R 2 0201C1712 10.22UF20% 6.3V X5R 2 0201C1713