>> altera_tse_pma_lvds_rx.v
altera_tse_pma_lvds_rx.v ( File view )
// megafunction wizard: %ALTLVDS_RX%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: ALTLVDS_RX
// ============================================================
// File Name: altera_tse_pma_lvds_rx.v
// Megafunction Name(s):
ALTLVDS_RX
// Simulation Library Files(s):
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
// 10.1 Internal Build 120 09/23/2010 PN Full Version
// ************************************************************
//Copyright (C)
Altera Corporation
//Your use of Altera Corporation's design tools, logic functions
//and other software and tools, and its AMPP partner logic
//functions, and any output files from any of the foregoing
//(including device programming or simulation files), and any
//associated documentation or information are expressly subject
//to the terms and conditions of the Altera Program License
//Subscription Agreement, Altera MegaCore Function License
//Agreement, or other applicable license agreement, including,
//without limitation, that your use is for the sole purpose of
//programming logic devices manufactured by Altera and sold by
//Altera or its authorized distributors.
Please refer to the
//applicable agreement for further details.
// synopsys translate_off
`timescale 1 ps / 1 ps
// synopsys translate_on
module altera_tse_pma_lvds_rx (
pll_areset,
rx_cda_reset,
rx_channel_data_align,
rx_inclock,
rx_divfwdclk,
rx_locked,
rx_outclock);
input [0:0]
input [0:0]
rx_channel_data_
input [0:0]
input [0:0]
output [0:0]
output [9:0]
wire [0:0] sub_wire0;
sub_wire1;
wire [9:0] sub_wire2;
sub_wire3;
wire [0:0] rx_divfwdclk = sub_wire0[0:0];
rx_locked = sub_wire1;
wire [9:0] rx_out = sub_wire2[9:0];
rx_outclock = sub_wire3;
altlvds_rx ALTLVDS_RX_component (
.rx_in (rx_in),
.rx_inclock (rx_inclock),
.rx_reset (rx_reset),
.pll_areset (pll_areset),
.rx_cda_reset (rx_cda_reset),
.rx_channel_data_align (rx_channel_data_align),
.rx_divfwdclk (sub_wire0),
.rx_locked (sub_wire1),
.rx_out (sub_wire2),
.rx_outclock (sub_wire3),
.dpa_pll_cal_busy (),
.dpa_pll_recal (1'b0),
.pll_phasecounterselect (),
.pll_phasedone (1'b1),
.pll_phasestep (),
.pll_phaseupdown (),
.pll_scanclk (),
.rx_cda_max (),
.rx_coreclk (1'b1),
.rx_data_align (1'b0),
.rx_data_align_reset (1'b0),
.rx_data_reset (1'b0),
.rx_deskew (1'b0),
.rx_dpa_lock_reset (1'b0),
.rx_dpa_locked (),
.rx_dpll_enable (1'b1),
.rx_dpll_hold (1'b0),
.rx_dpll_reset (1'b0),
.rx_enable (1'b1),
.rx_fifo_reset (1'b0),
.rx_pll_enable (1'b1),
.rx_readclock (1'b0),
.rx_syncclock (1'b0));
ALTLVDS_RX_component.buffer_implementation = &RAM&,
ALTLVDS_RX_component.cds_mode = &UNUSED&,
ALTLVDS_RX_component.common_rx_tx_pll = &ON&,
ALTLVDS_RX_component.data_align_rollover = 10,
ALTLVDS_RX_component.data_rate = &1250.0 Mbps&,
ALTLVDS_RX_component.deserialization_factor = 10,
ALTLVDS_RX_component.dpa_initial_phase_value = 0,
ALTLVDS_RX_component.dpll_lock_count = 0,
ALTLVDS_RX_component.dpll_lock_window = 0,
ALTLVDS_RX_component.enable_dpa_align_to_rising_edge_only = &OFF&,
ALTLVDS_RX_component.enable_dpa_calibration = &ON&,
ALTLVDS_RX_component.enable_dpa_fifo = &UNUSED&,
ALTLVDS_RX_component.enable_dpa_initial_phase_selection = &OFF&,
ALTLVDS_RX_component.enable_dpa_mode = &ON&,
ALTLVDS_RX_component.enable_dpa_pll_calibration = &OFF&,
ALTLVDS_RX_component.enable_soft_cdr_mode = &ON&,
ALTLVDS_RX_component.implement_in_les = &OFF&,
ALTLVDS_RX_component.inclock_boost = 0,
ALTLVDS_RX_component.inclock_data_alignment = &EDGE_ALIGNED&,
ALTLVDS_RX_component.inclock_period = 8000,
ALTLVDS_RX_component.inclock_phase_shift = 0,
ALTLVDS_RX_component.input_data_rate = 1250,
ALTLVDS_RX_component.intended_device_family = &Stratix III&,
ALTLVDS_RX_component.lose_lock_on_one_change = &UNUSED&,
ALTLVDS_RX_component.lpm_hint = &UNUSED&,
ALTLVDS_RX_component.lpm_type = &altlvds_rx&,
ALTLVDS_RX_component.number_of_channels = 1,
ALTLVDS_RX_component.outclock_resource = &AUTO&,
ALTLVDS_RX_component.pll_operation_mode = &UNUSED&,
ALTLVDS_RX_component.pll_self_reset_on_loss_lock = &UNUSED&,
ALTLVDS_RX_component.port_rx_channel_data_align = &PORT_USED&,
ALTLVDS_RX_component.port_rx_data_align = &PORT_UNUSED&,
ALTLVDS_RX_component.refclk_frequency = &125.00 MHz&,
ALTLVDS_RX_component.registered_data_align_input = &UNUSED&,
ALTLVDS_RX_component.registered_output = &ON&,
ALTLVDS_RX_component.reset_fifo_at_first_lock = &UNUSED&,
ALTLVDS_RX_component.rx_align_data_reg = &UNUSED&,
ALTLVDS_RX_component.sim_dpa_is_negative_ppm_drift = &OFF&,
ALTLVDS_RX_component.sim_dpa_net_ppm_variation = 0,
ALTLVDS_RX_component.sim_dpa_output_clock_phase_shift = 0,
ALTLVDS_RX_component.use_coreclock_input = &OFF&,
ALTLVDS_RX_component.use_dpll_rawperror = &OFF&,
ALTLVDS_RX_component.use_external_pll = &OFF&,
ALTLVDS_RX_component.use_no_phase_shift = &ON&,
ALTLVDS_RX_component.x_on_bitslip = &OFF&,
ALTLVDS_RX_component.clk_src_is_pll = &off&;
// ============================================================
// CNX file retrieval info
// ============================================================
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: PRIVATE: Bitslip NUMERIC &10&
// Retrieval info: PRIVATE: Clock_Choices STRING &tx_coreclock&
// Retrieval info: PRIVATE: Clock_Mode NUMERIC &0&
// Retrieval info: PRIVATE: Data_rate STRING &1250.0&
// Retrieval info: PRIVATE: Deser_Factor NUMERIC &10&
// Retrieval info: PRIVATE: Dpll_Lock_Count STRING &&
// Retrieval info: PRIVATE: Dpll_Lock_Window STRING &&
// Retrieval info: PRIVATE: Enable_DPA_Mode STRING &ON&
// Retrieval info: PRIVATE: Enable_FIFO_DPA_Channels STRING &&
// Retrieval info: PRIVATE: Ext_PLL STRING &OFF&
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING &Stratix III&
// Retrieval info: PRIVATE: Le_Serdes STRING &OFF&
// Retrieval info: PRIVATE: Num_Channel NUMERIC &1&
// Retrieval info: PRIVATE: Outclock_Divide_By STRING &&
// Retrieval info: PRIVATE: pCNX_OUTCLK_ALIGN STRING &&
// Retrieval info: PRIVATE: pINCLOCK_PHASE_SHIFT STRING &&
// Retrieval info: PRIVATE: PLL_Enable NUMERIC &0&
// Retrieval info: PRIVATE: PLL_Freq STRING &125.00&
// Retrieval info: PRIVATE: PLL_Period STRING &8.000&
// Retrieval info: PRIVATE: pOUTCLOCK_PHASE_SHIFT STRING &&
// Retrieval info: PRIVATE: Reg_InOut NUMERIC &1&
// Retrieval info: PRIVATE: Use_Clock_Resc STRING &AUTO&
// Retrieval info: PRIVATE: Use_Common_Rx_Tx_Plls NUMERIC &1&
// Retrieval info: PRIVATE: Use_Lock NUMERIC &0&
// Retrieval info: PRIVATE: Use_Pll_Areset NUMERIC &0&
// Retrieval info: PRIVATE: Use_Rawperror STRING &&
// Retrieval info: PRIVATE: Use_Tx_Out_Phase STRING &&
// Retrieval info: CONSTANT: BUFFER_IMPLEMENTATION STRING &RAM&
// Retrieval info: CONSTANT: CDS_MODE STRING &UNUSED&
// Retrieval info: CONSTANT: COMMON_RX_TX_PLL STRING &ON&
// Retrieval info: CONSTANT: clk_src_is_pll STRING &off&
// Retrieval info: CONSTANT: DATA_ALIGN_ROLLOVER NUMERIC &10&
// Retrieval info: CONSTANT: DATA_RATE STRING &1250.0 Mbps&
// Retrieval info: CONSTANT: DESERIALIZATION_FACTOR NUMERIC &10&
// Retrieval info: CONSTANT: DPA_INITIAL_PHASE_VALUE NUMERIC &0&
// Retrieval info: CONSTANT: DPLL_LOCK_COUNT NUMERIC &0&
// Retrieval info: CONSTANT: DPLL_LOCK_WINDOW NUMERIC &0&
// Retrieval info: CONSTANT: ENABLE_DPA_ALIGN_TO_RISING_EDGE_ONLY STRING &OFF&
// Retrieval info: CONSTANT: ENABLE_DPA_CALIBRATION STRING &ON&
// Retrieval info: CONSTANT: ENABLE_DPA_FIFO STRING &UNUSED&
// Retrieval info: CONSTANT: ENABLE_DPA_INITIAL_PHASE_SELECTION STRING &OFF&
// Retrieval info: CONSTANT: ENABLE_DPA_MODE STRING &ON&
// Retrieval info: CONSTANT: ENABLE_DPA_PLL_CALIBRATION STRING &OFF&
// Retrieval info: CONSTANT: ENABLE_SOFT_CDR_MODE STRING &ON&
// Retrieval info: CONSTANT: IMPLEMENT_IN_LES STRING &OFF&
// Retrieval info: CONSTANT: INCLOCK_BOOST NUMERIC &0&
// Retrieval info: CONSTANT: INCLOCK_DATA_ALIGNMENT STRING &EDGE_ALIGNED&
// Retrieval info: CONSTANT: INCLOCK_PERIOD NUMERIC &8000&
// Retrieval info: CONSTANT: INCLOCK_PHASE_SHIFT NUMERIC &0&
// Retrieval info: CONSTANT: INPUT_DATA_RATE NUMERIC &1250&
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING &Stratix III&
// Retrieval info: CONSTANT: LOSE_LOCK_ON_ONE_CHANGE STRING &UNUSED&
// Retrieval info: CONSTANT: LPM_HINT STRING &UNUSED&
// Retrieval info: CONSTANT: LPM_TYPE STRING &altlvds_rx&
// Retrieval info: CONSTANT: NUMBER_OF_CHANNELS NUMERIC &1&
// Retrieval info: CONSTANT: OUTCLOCK_RESOURCE STRING &AUTO&
// Retrieval info: CONSTANT: PLL_OPERATION_MODE STRING &UNUSED&
// Retrieval info: CONSTANT: PLL_SELF_RESET_ON_LOSS_LOCK STRING &UNUSED&
// Retrieval info: CONSTANT: PORT_RX_CHANNEL_DATA_ALIGN STRING &PORT_USED&
// Retrieval info: CONSTANT: PORT_RX_DATA_ALIGN STRING &PORT_UNUSED&
// Retrieval info: CONSTANT: REFCLK_FREQUENCY STRING &125.00 MHz&
// Retrieval info: CONSTANT: REGISTERED_DATA_ALIGN_INPUT STRING &UNUSED&
// Retrieval info: CONSTANT: REGISTERED_OUTPUT STRING &ON&
// Retrieval info: CONSTANT: RESET_FIFO_AT_FIRST_LOCK STRING &UNUSED&
// Retrieval info: CONSTANT: RX_ALIGN_DATA_REG STRING &UNUSED&
// Retrieval info: CONSTANT: SIM_DPA_IS_NEGATIVE_PPM_DRIFT STRING &OFF&
// Retrieval info: CONSTANT: SIM_DPA_NET_PPM_VARIATION NUMERIC &0&
// Retrieval info: CONSTANT: SIM_DPA_OUTPUT_CLOCK_PHASE_SHIFT NUMERIC &0&
// Retrieval info: CONSTANT: USE_CORECLOCK_INPUT STRING &OFF&
// Retrieval info: CONSTANT: USE_DPLL_RAWPERROR STRING &OFF&
// Retrieval info: C
(Not finished, please download and read the complete file)
Expand＞ ＜Close
Want complete source code? Download it here
0 lines left, continue to read ▼
Sponsored links
Tips: You can preview the content of files by clicking file names^_^
66.00 B 22:28
908.00 B 22:30
66.00 B 22:31
549.00 B 22:31
717.00 B 21:35
a_dpfifo_3541.tdf5.85 kB 21:21
a_dpfifo_9i31.tdf5.39 kB 21:21
a_dpfifo_ai31.tdf6.38 kB 21:22
a_dpfifo_bi31.tdf6.38 kB 21:22
a_dpfifo_h031.tdf3.28 kB 21:22
a_dpfifo_nj31.tdf6.39 kB 21:22
a_dpfifo_qg31.tdf5.38 kB 21:21
a_fefifo_7cf.tdf3.84 kB 21:22
add_sub_hui.tdf1.54 kB 21:23
15.33 kB 21:21
15.33 kB 21:21
75.06 kB 21:21
75.09 kB 21:21
28.57 kB 21:21
28.73 kB 21:21
altpll_dyn_phase_le_rfo.tdf2.46 kB 21:22
altpll_dyn_phase_le_sfo.tdf2.46 kB 21:22
altpll_dyn_phase_le_tfo.tdf2.46 kB 21:22
altpll_h5k3.tdf10.00 kB 21:22
altsyncram_15g1.tdf6.40 kB 21:21
altsyncram_18g1.tdf14.75 kB 21:21
altsyncram_3d81.tdf12.18 kB 21:23
altsyncram_3eg1.tdf46.47 kB 21:21
altsyncram_3jd1.tdf36.92 kB 21:21
altsyncram_4ch1.tdf23.46 kB 21:22
altsyncram_4ni1.tdf6.34 kB 21:22
altsyncram_78g1.tdf28.39 kB 21:21
altsyncram_7ci1.tdf26.81 kB 21:21
altsyncram_ahl1.tdf5.38 kB 21:22
altsyncram_bu62.tdf54.86 kB 21:22
altsyncram_deg1.tdf42.25 kB 21:21
altsyncram_e2k1.tdf40.17 kB 21:21
altsyncram_e5k1.tdf40.30 kB 21:21
altsyncram_etd1.tdf50.84 kB 21:22
altsyncram_fp81.tdf30.61 kB 21:21
altsyncram_i0m1.tdf12.44 kB 21:22
altsyncram_i2d1.tdf33.73 kB 21:21
altsyncram_iqd1.tdf77.65 kB 21:22
altsyncram_k8h1.tdf36.69 kB 21:21
altsyncram_kqd1.tdf44.20 kB 21:22
altsyncram_kqh1.tdf6.29 kB 21:21
altsyncram_l8h1.tdf36.69 kB 21:21
altsyncram_ohl1.tdf12.65 kB 21:22
altsyncram_pif1.tdf39.12 kB 21:21
altsyncram_qsd1.tdf116.74 kB 21:21
altsyncram_spd1.tdf30.17 kB 21:21
altsyncram_unh1.tdf20.64 kB 21:21
altsyncram_utd1.tdf44.38 kB 21:21
cmpr_5r8.tdf1.61 kB 21:21
cmpr_6r8.tdf1.67 kB 21:22
cmpr_7r8.tdf1.77 kB 21:22
cmpr_8r8.tdf1.83 kB 21:22
cmpr_ar8.tdf1.99 kB 21:21
cmpr_ffc.tdf1.71 kB 21:22
cmpr_gfc.tdf1.81 kB 21:22
cmpr_hfc.tdf1.87 kB 21:23
cmpr_tdg.tdf1.69 kB 21:21
cntr_0n7.tdf2.76 kB 21:22
cntr_1n7.tdf2.89 kB 21:22
cntr_2n7.tdf3.02 kB 21:22
cntr_4n7.tdf3.27 kB 21:21
cntr_hpf.tdf3.62 kB 21:23
cntr_jmb.tdf2.63 kB 21:21
cntr_kmb.tdf2.78 kB 21:22
cntr_lmb.tdf2.91 kB 21:22
cntr_mmb.tdf3.04 kB 21:22
cntr_n9f.tdf2.68 kB 21:21
cntr_nmb.tdf3.17 kB 21:21
cntr_omb.tdf3.29 kB 21:21
cntr_p0e.tdf3.17 kB 21:22
cntr_vee.tdf3.20 kB 21:22
cntr_vm7.tdf2.60 kB 21:21
ddio_bidir_e4h.tdf3.11 kB 21:22
ddio_bidir_idf.tdf2.39 kB 21:22
ddio_in_0fd.tdf2.19 kB 21:22
ddio_in_l3e.tdf2.20 kB 21:21
ddio_in_o3e.tdf2.20 kB 21:21
ddio_out_1jd.tdf2.18 kB 21:22
ddio_out_egd.tdf2.18 kB 21:22
ddio_out_lob.tdf2.16 kB 21:21
ddio_out_oob.tdf2.16 kB 21:21
ddio_out_pkd.tdf2.18 kB 21:18
dpram_ek21.tdf2.37 kB 21:22
eth_std_main_system.bsf18.39 kB 21:19
428.91 kB 21:19
242.87 kB 21:19
737.77 kB 21:21
24.05 kB 21:20
53.90 kB 21:20
51.29 kB 21:20
3.93 kB 21:20
7.78 kB 21:20
66.69 kB 21:20
3.71 kB 21:20
117.94 kB 21:20
172.27 kB 21:20
93.76 kB 21:20
50.45 kB 21:20
36.31 kB 21:20
17.58 kB 21:20
17.41 kB 21:20
alt_mem_ddrx_define.iv1.37 kB 21:20
14.22 kB 21:20
31.82 kB 21:20
57.20 kB 21:20
9.66 kB 21:20
12.68 kB 21:20
20.55 kB 21:20
47.66 kB 21:20
7.19 kB 21:20
9.76 kB 21:20
7.42 kB 21:20
16.50 kB 21:20
10.68 kB 21:20
13.90 kB 21:20
116.74 kB 21:20
49.92 kB 21:20
196.54 kB 21:20
71.22 kB 21:20
166.77 kB 21:20
66.12 kB 21:20
49.49 kB 21:20
5.16 kB 21:20
11.28 kB 21:20
31.44 kB 21:20
4.87 kB 21:20
altera_merlin_address_alignment.sv11.17 kB 21:20
altera_merlin_arbitrator.sv9.23 kB 21:20
altera_merlin_burst_adapter.sv54.86 kB 21:20
altera_merlin_burst_uncompressor.sv12.64 kB 21:20
altera_merlin_master_agent.sv11.99 kB 21:20
altera_merlin_master_translator.sv20.42 kB 21:20
altera_merlin_slave_agent.sv27.29 kB 21:20
altera_merlin_slave_translator.sv16.71 kB 21:20
altera_merlin_traffic_limiter.sv15.14 kB 21:20
altera_merlin_width_adapter.sv55.23 kB 21:20
altera_reset_controller.sdc1.69 kB 21:20
3.50 kB 21:20
3.47 kB 21:20
altera_tristate_controller_aggregator.sv9.15 kB 21:20
altera_tristate_controller_translator.sv6.92 kB 21:20
7.50 kB 21:20
8.58 kB 21:20
6.37 kB 21:20
13.20 kB 21:20
11.27 kB 21:20
14.22 kB 21:20
5.83 kB 21:20
20.45 kB 21:20
21.32 kB 21:20
25.86 kB 21:20
25.94 kB 21:20
74.36 kB 21:20
74.40 kB 21:20
59.02 kB 21:20
59.08 kB 21:20
1.66 kB 21:20
2.83 kB 21:20
2.96 kB 21:20
2.41 kB 21:20
3.27 kB 21:20
3.77 kB 21:20
1.16 kB 21:20
3.76 kB 21:20
3.38 kB 21:20
3.74 kB 21:20
2.66 kB 21:20
1.83 kB 21:20
6.84 kB 21:20
7.73 kB 21:20
6.14 kB 21:20
43.98 kB 21:20
9.49 kB 21:20
9.48 kB 21:20
11.91 kB 21:20
3.87 kB 21:20
1.83 kB 21:20
117.68 kB 21:20
101.60 kB 21:20
26.91 kB 21:20
19.95 kB 21:20
21.44 kB 21:20
5.52 kB 21:20
5.17 kB 21:20
4.13 kB 21:20
13.30 kB 21:20
15.07 kB 21:20
9.04 kB 21:20
3.75 kB 21:20
11.73 kB 21:20
10.75 kB 21:20
2.77 kB 21:20
3.21 kB 21:20
3.17 kB 21:20
5.87 kB 21:20
5.37 kB 21:20
5.46 kB 21:20
17.56 kB 21:20
43.66 kB 21:20
20.25 kB 21:20
33.48 kB 21:20
20.43 kB 21:20
20.05 kB 21:20
20.68 kB 21:20
19.19 kB 21:20
20.38 kB 21:20
23.59 kB 21:20
108.48 kB 21:20
88.73 kB 21:20
altera_tse_mac_woff.ocp1.70 kB 21:20
69.25 kB 21:20
17.05 kB 21:20
16.58 kB 21:20
2.54 kB 21:20
8.25 kB 21:20
24.84 kB 21:20
8.43 kB 21:20
7.63 kB 21:20
4.18 kB 21:20
2.89 kB 21:20
8.77 kB 21:20
176.63 kB 21:20
138.37 kB 21:20
301.92 kB 21:20
468.78 kB 21:20
430.26 kB 21:20
6.95 kB 21:20
5.52 kB 21:20
5.91 kB 21:20
14.64 kB 21:20
14.90 kB 21:20
13.17 kB 21:20
altera_tse_ph_calculator.sv5.38 kB 21:20
12.30 kB 21:20
12.48 kB 21:20
8.29 kB 21:20
7.55 kB 21:20
altera_tse_ptp_1588_rx_top.ocp1.45 kB 21:20
12.39 kB 21:20
altera_tse_ptp_1588_tx_top.ocp1.55 kB 21:20
24.45 kB 21:20
43.20 kB 21:20
7.84 kB 21:20
7.84 kB 21:20
91.57 kB 21:20
82.88 kB 21:20
altera_tse_reset_ctrl_lego.sv9.98 kB 21:20
altera_tse_reset_sequencer.sv8.25 kB 21:20
3.55 kB 21:20
24.73 kB 21:20
4.18 kB 21:20
4.09 kB 21:20
7.73 kB 21:20
4.36 kB 21:20
4.25 kB 21:20
12.91 kB 21:20
24.63 kB 21:20
20.34 kB 21:20
25.41 kB 21:20
21.48 kB 21:20
19.53 kB 21:20
21.08 kB 21:20
29.31 kB 21:20
3.06 kB 21:20
8.77 kB 21:20
27.72 kB 21:20
16.19 kB 21:20
10.84 kB 21:20
2.91 kB 21:20
1.70 kB 21:20
3.80 kB 21:20
2.13 kB 21:20
2.78 kB 21:20
3.63 kB 21:20
30.96 kB 21:20
92.88 kB 21:20
13.88 kB 21:20
4.62 kB 21:20
4.43 kB 21:20
11.44 kB 21:20
11.11 kB 21:20
altera_tse_top_1000_base_x.ocp1.65 kB 21:20
15.67 kB 21:20
altera_tse_top_1000_base_x_strx_gx.ocp1.63 kB 21:20
16.07 kB 21:20
29.84 kB 21:20
24.20 kB 21:20
31.41 kB 21:20
altera_tse_top_gen_host.ocp1.63 kB 21:20
64.26 kB 21:20
6.55 kB 21:20
272.13 kB 21:20
235.60 kB 21:20
396.49 kB 21:20
6.62 kB 21:20
6.94 kB 21:20
6.11 kB 21:20
18.63 kB 21:20
8.70 kB 21:20
9.65 kB 21:20
4.59 kB 21:20
11.38 kB 21:20
48.38 kB 21:20
45.76 kB 21:20
49.91 kB 21:20
51.20 kB 21:20
23.63 kB 21:20
6.32 kB 21:20
17.07 kB 21:20
15.02 kB 21:20
42.27 kB 21:20
9.46 kB 21:20
11.20 kB 21:20
15.52 kB 21:20
2.29 kB 21:20
8.95 kB 21:20
26.59 kB 21:20
14.83 kB 21:20
2.63 kB 21:20
eth_std_main_system_addr_router.sv8.05 kB 21:20
eth_std_main_system_addr_router_001.sv7.44 kB 21:20
eth_std_main_system_addr_router_003.sv9.13 kB 21:20
11.29 kB 21:20
eth_std_main_system_cmd_xbar_demux.sv4.70 kB 21:20
eth_std_main_system_cmd_xbar_demux_001.sv3.46 kB 21:20
eth_std_main_system_cmd_xbar_demux_003.sv7.17 kB 21:20
eth_std_main_system_cmd_xbar_mux.sv11.82 kB 21:20
eth_std_main_system_cmd_xbar_mux_002.sv13.49 kB 21:20
eth_std_main_system_cpu.ocp864.00 B 21:20
eth_std_main_system_cpu.sdc4.29 kB 21:20
447.44 kB 21:20
eth_std_main_system_cpu_bht_ram.mif2.39 kB 21:20
eth_std_main_system_cpu_dc_tag_ram.mif13.15 kB 21:20
eth_std_main_system_cpu_ic_tag_ram.mif15.15 kB 21:20
7.09 kB 21:20
8.50 kB 21:20
10.50 kB 21:20
6.36 kB 21:20
1.51 kB 21:20
eth_std_main_system_cpu_ociram_default_contents.mif4.14 kB 21:20
eth_std_main_system_cpu_rf_ram_a.mif600.00 B 21:20
eth_std_main_system_cpu_rf_ram_b.mif600.00 B 21:20
29.71 kB 21:20
269.59 kB 21:20
eth_std_main_system_ethernet_subsystem_addr_router.sv8.05 kB 21:21
eth_std_main_system_ethernet_subsystem_addr_router_001.sv7.49 kB 21:21
eth_std_main_system_ethernet_subsystem_cmd_xbar_demux.sv4.70 kB 21:21
eth_std_main_system_ethernet_subsystem_cmd_xbar_demux_001.sv3.50 kB 21:21
eth_std_main_system_ethernet_subsystem_cmd_xbar_mux_003.sv12.02 kB 21:21
eth_std_main_system_ethernet_subsystem_descriptor_memory.hex42.01 kB 21:21
4.96 kB 21:21
eth_std_main_system_ethernet_subsystem_id_router.sv7.36 kB 21:21
eth_std_main_system_ethernet_subsystem_id_router_003.sv7.63 kB 21:21
eth_std_main_system_ethernet_subsystem_rsp_xbar_demux.sv3.49 kB 21:21
eth_std_main_system_ethernet_subsystem_rsp_xbar_demux_003.sv5.33 kB 21:21
eth_std_main_system_ethernet_subsystem_rsp_xbar_mux.sv11.96 kB 21:21
100.32 kB 21:21
102.69 kB 21:21
17.48 kB 21:20
eth_std_main_system_ethernet_subsystem_tse_mac_constraints.sdc34.52 kB 21:20
14.38 kB 21:20
3.69 kB 21:20
28.25 kB 21:20
eth_std_main_system_flash_tristate_bridge.sv4.76 kB 21:20
eth_std_main_system_id_router.sv7.39 kB 21:20
eth_std_main_system_id_router_001.sv7.40 kB 21:20
eth_std_main_system_id_router_002.sv7.57 kB 21:20
eth_std_main_system_id_router_003.sv7.32 kB 21:20
eth_std_main_system_irq_mapper.sv2.13 kB 21:20
307.08 kB 21:20
eth_std_main_system_peripheral_subsystem_addr_router.sv9.24 kB 21:21
4.73 kB 21:21
eth_std_main_system_peripheral_subsystem_cmd_xbar_demux.sv7.80 kB 21:21
7.22 kB 21:21
eth_std_main_system_peripheral_subsystem_id_router.sv7.37 kB 21:21
19.36 kB 21:21
2.56 kB 21:21
8.27 kB 21:21
3.17 kB 21:21
2.67 kB 21:21
eth_std_main_system_peripheral_subsystem_rsp_xbar_demux.sv3.49 kB 21:21
eth_std_main_system_peripheral_subsystem_rsp_xbar_mux.sv15.90 kB 21:21
7.21 kB 21:21
eth_std_main_system_rsp_xbar_demux.sv4.08 kB 21:20
eth_std_main_system_rsp_xbar_demux_002.sv5.32 kB 21:20
eth_std_main_system_rsp_xbar_mux.sv11.93 kB 21:20
eth_std_main_system_rsp_xbar_mux_003.sv15.09 kB 21:20
29.44 kB 21:20
40.43 kB 21:20
15.96 kB 21:20
1.38 kB 21:20
31.32 kB 21:20
eth_std_main_system_sdram_example_top.sdc162.00 B 21:20
7.07 kB 21:20
24.87 kB 21:20
25.17 kB 21:20
30.46 kB 21:20
181.87 kB 21:20
22.69 kB 21:20
634.14 kB 21:20
19.58 kB 21:20
39.42 kB 21:20
eth_std_main_system_sdram_phy_ddr_timing.sdc32.62 kB 21:20
19.78 kB 21:20
12.90 kB 21:20
1.42 kB 21:20
logic_util_heursitic.dat1.23 MB 21:33
mult_av01.tdf2.52 kB 21:23
mult_bo01.tdf2.52 kB 21:23
mux_4qc.tdf2.30 kB 21:21
mux_irc.tdf5.91 kB 21:21
niosii_ethernet_standard_3c120.db_info138.00 B 22:25
niosii_ethernet_standard_3c120.sld_design_entry.sci197.00 B 18:07
prev_cmp_niosii_ethernet_standard_3c120.qmsg27.31 kB 21:19
scfifo_0741.tdf2.45 kB 21:22
scfifo_1741.tdf2.45 kB 21:22
scfifo_2c31.tdf2.41 kB 21:21
scfifo_aq21.tdf2.45 kB 21:22
scfifo_e841.tdf2.46 kB 21:22
scfifo_ja31.tdf2.40 kB 21:21
scfifo_su31.tdf2.48 kB 21:21
shift_taps_lmm.tdf2.40 kB 21:23
ddr2_bot_phy_ddr_timing.sdc31.54 kB 07:31
eth_std_main_system.qsys47.60 kB 13:54
eth_std_main_system.sopcinfo829.43 kB 14:20
ethernet_system.qsys13.50 kB 15:03
3.56 kB 07:31
653.00 B 21:22
niosii_ethernet_standard_3c120.db_info138.00 B 22:25
niosii_ethernet_standard_3c120.asm.rpt8.91 kB 21:35
niosii_ethernet_standard_3c120.done26.00 B 21:41
niosii_ethernet_standard_3c120.fit.rpt3.64 MB 21:35
niosii_ethernet_standard_3c120.fit.smsg567.00 B 21:35
niosii_ethernet_standard_3c120.fit.summary669.00 B 21:35
niosii_ethernet_standard_3c120.flow.rpt10.93 kB 21:36
niosii_ethernet_standard_3c120.jdi24.79 kB 21:35
niosii_ethernet_standard_3c120.map.rpt12.09 MB 21:26
niosii_ethernet_standard_3c120.map.smsg26.04 kB 21:26
niosii_ethernet_standard_3c120.map.summary514.00 B 21:26
niosii_ethernet_standard_3c120.pin89.66 kB 21:35
niosii_ethernet_standard_3c120.qpf1.25 kB 14:29
niosii_ethernet_standard_3c120.qsf57.50 kB 18:07
niosii_ethernet_standard_3c120.qws878.00 B 22:23
niosii_ethernet_standard_3c120.sdc1.44 kB 14:40
niosii_ethernet_standard_3c120.sof3.38 MB 14:51
niosii_ethernet_standard_3c120.sta.rpt7.04 MB 21:36
niosii_ethernet_standard_3c120.sta.summary8.87 kB 21:36
niosii_ethernet_standard_3c120_assignment_defaults.qdf56.11 kB 15:01
niosii_ethernet_standard_3c120_time_limited.sof3.38 MB 21:35
peripheral_system.qsys12.54 kB 12:12
&.lock&0.00 B 11:53
.log963.00 B 11:56
repositories.xml.zip438.00 B 11:55
.log84.00 B 12:01
ee.2.pdom76.00 kB 11:56
ee_bsp.0.pdom2.04 MB 11:56
&.log&0.00 B 11:55
ee.sc23.66 kB 11:56
ee_bsp.sc23.67 kB 11:56
1.00 B 11:53
1.00 B 11:53
226.00 B 12:01
ee.build.log130.00 B 11:56
ee_bsp.build.log135.00 B 11:56
global-build.log265.00 B 11:56
properties.index739.00 B 11:57
properties.index364.00 B 11:56
.markers1.61 kB 12:01
history.version1.00 B 12:01
properties.index104.00 B 12:01
properties.version1.00 B 12:01
1.tree22.22 kB 12:01
org.eclipse.core.resources691.00 B 12:01
com.altera.sbtgui.ui.prefs429.00 B 11:55
org.eclipse.cdt.core.prj-ee.prefs58.00 B 11:56
org.eclipse.cdt.core.prj-ee_bsp.prefs58.00 B 11:55
org.eclipse.cdt.debug.core.prefs751.00 B 11:57
org.eclipse.cdt.managedbuilder.core.prefs3.00 kB 11:56
org.eclipse.cdt.mylyn.ui.prefs75.00 B 12:01
org.eclipse.cdt.ui.prefs249.00 B 12:01
org.eclipse.core.resources.prefs74.00 B 11:53
org.eclipse.debug.core.prefs631.00 B 12:01
org.eclipse.debug.ui.prefs283.00 B 12:01
org.eclipse.epp.usagedata.recording.prefs94.00 B 11:54
org.eclipse.mylyn.context.core.prefs62.00 B 11:53
org.eclipse.mylyn.monitor.ui.prefs97.00 B 11:53
org.eclipse.team.cvs.ui.prefs57.00 B 12:01
org.eclipse.team.ui.prefs69.00 B 12:01
org.eclipse.ui.editors.prefs69.00 B 12:01
org.eclipse.ui.ide.prefs129.00 B 12:01
org.eclipse.ui.prefs48.00 B 11:54
org.eclipse.ui.workbench.prefs1.01 kB 12:01
usagedata.csv16.32 kB 12:01
80.00 B 12:01
17.83 kB 12:01
257.00 B 11:53
26.00 B 11:53
7.35 kB 00:24
12.76 kB 00:24
6.86 kB 00:24
create-this-app2.88 kB 10:57
43.86 kB 00:24
7.08 kB 00:24
16.29 kB 00:24
11.30 kB 00:24
ro_zipfs.flash95.07 kB 16:07
ro_zipfs.zip38.01 kB 00:24
403.00 B 15:07
14.66 kB 14:12
web_server.elf2.37 MB 15:17
6.07 kB 00:24
create-this-bsp880.00 B 14:01
.cproject35.34 kB 11:56
.project2.92 kB 11:56
34.73 kB 11:56
12.76 kB 11:56
6.86 kB 11:56
create-this-app3.99 kB 11:55
43.75 kB 11:56
7.06 kB 11:56
16.29 kB 11:56
11.28 kB 11:56
ro_zipfs.zip38.01 kB 11:56
340.00 B 11:56
14.62 kB 11:56
6.07 kB 11:56
.cproject34.25 kB 11:56
.project2.61 kB 11:56
3.04 kB 11:55
3.80 kB 11:55
1.96 kB 11:55
3.89 kB 11:55
7.88 kB 11:55
7.19 kB 11:55
4.68 kB 11:55
1.52 kB 11:55
3.66 kB 11:55
2.63 kB 11:55
6.77 kB 11:55
2.57 kB 11:55
3.28 kB 11:55
5.64 kB 11:55
3.99 kB 11:55
2.73 kB 11:55
4.94 kB 11:55
4.10 kB 11:55
2.71 kB 11:55
4.77 kB 11:55
8.20 kB 11:55
8.62 kB 11:55
7.14 kB 11:55
4.70 kB 11:55
5.88 kB 11:55
7.13 kB 11:55
5.31 kB 11:55
3.81 kB 11:55
8.47 kB 11:55
2.52 kB 11:55
5.32 kB 11:55
5.03 kB 11:55
4.01 kB 11:55
15.60 kB 11:55
3.55 kB 11:55
3.74 kB 11:55
4.27 kB 11:55
3.20 kB 11:55
3.41 kB 11:55
4.64 kB 11:55
3.23 kB 11:55
3.55 kB 11:55
4.15 kB 11:55
5.92 kB 11:55
4.68 kB 11:55
4.03 kB 11:55
4.03 kB 11:55
4.01 kB 11:55
2.73 kB 11:55
4.07 kB 11:55
5.59 kB 11:55
2.86 kB 11:55
3.12 kB 11:55
3.11 kB 11:55
3.71 kB 11:55
3.71 kB 11:55
2.73 kB 11:55
2.71 kB 11:55
alt_exception_entry.S13.57 kB 11:55
alt_exception_muldiv.S21.38 kB 11:55
alt_exception_trap.S3.59 kB 11:55
3.04 kB 11:55
3.73 kB 11:55
4.46 kB 11:55
3.44 kB 11:55
3.04 kB 11:55
3.67 kB 11:55
3.79 kB 11:55
3.57 kB 11:55
3.05 kB 11:55
3.68 kB 11:55
4.90 kB 11:55
4.15 kB 11:55
3.06 kB 11:55
2.80 kB 11:55
4.92 kB 11:55
9.30 kB 11:55
3.41 kB 11:55
2.59 kB 11:55
5.03 kB 11:55
4.67 kB 11:55
9.07 kB 11:55
4.19 kB 11:55
4.45 kB 11:55
5.92 kB 11:55
alt_irq_entry.S4.68 kB 11:55
6.43 kB 11:55
4.46 kB 11:55
2.61 kB 11:55
4.70 kB 11:55
4.18 kB 11:55
3.04 kB 11:55
3.72 kB 11:55
alt_log_macro.S1.76 kB 11:55
14.51 kB 11:55
4.24 kB 11:55
6.20 kB 11:55
alt_mcount.S8.29 kB 11:55
5.65 kB 11:55
5.10 kB 11:55
3.02 kB 11:55
2.98 kB 11:55
4.66 kB 11:55
2.96 kB 11:55
2.79 kB 11:55
2.83 kB 11:55
3.04 kB 11:55
5.36 kB 11:55
4.19 kB 11:55
alt_software_exception.S2.97 kB 11:55
3.05 kB 11:55
5.41 kB 11:55
3.48 kB 11:55
2.73 kB 11:55
2.83 kB 11:55
3.04 kB 11:55
3.25 kB 11:55
2.88 kB 11:55
5.09 kB 11:55
1.54 kB 11:55
crt0.S14.54 kB 11:55
os_cpu_a.S9.03 kB 11:55
7.89 kB 11:55
38.93 kB 11:55
4.47 kB 11:55
3.39 kB 11:55
4.25 kB 11:55
2.76 kB 11:55
4.15 kB 11:55
3.58 kB 11:55
80.27 kB 11:55
3.98 kB 11:55
4.51 kB 11:55
86.39 kB 11:55
12.28 kB 11:55
54.71 kB 11:55
30.16 kB 11:55
19.48 kB 11:55
36.82 kB 11:55
41.26 kB 11:55
28.75 kB 11:55
50.85 kB 11:55
11.17 kB 11:55
45.82 kB 11:55
4.61 kB 11:55
create-this-bsp1.36 kB 11:55
8.86 kB 11:55
3.17 kB 11:55
3.63 kB 11:55
3.23 kB 11:55
7.90 kB 11:55
5.88 kB 11:55
4.50 kB 11:55
11.43 kB 11:55
4.00 kB 11:55
9.92 kB 11:55
5.75 kB 11:55
6.36 kB 11:55
3.10 kB 11:55
2.78 kB 11:55
9.12 kB 11:55
10.29 kB 11:55
43.58 kB 11:55
16.14 kB 11:55
4.94 kB 11:55
3.73 kB 11:55
9.47 kB 11:55
2.64 kB 11:55
32.51 kB 11:55
11.74 kB 11:55
8.28 kB 11:55
7.54 kB 11:55
19.24 kB 11:55
4.00 kB 11:55
10.03 kB 11:55
3.52 kB 11:55
6.82 kB 11:55
7.78 kB 11:55
3.98 kB 11:55
29.05 kB 11:55
4.26 kB 11:55
4.85 kB 11:55
6.11 kB 11:55
2.81 kB 11:55
99.93 kB 11:55
3.46 kB 11:55
15.62 kB 11:55
32.45 kB 11:55
4.47 kB 11:55
8.65 kB 11:55
3.74 kB 11:55
21.17 kB 11:55
7.82 kB 11:55
7.90 kB 11:55
3.85 kB 11:55
6.31 kB 11:55
3.75 kB 11:55
3.95 kB 11:55
4.15 kB 11:55
9.01 kB 11:55
1.29 kB 11:55
1.89 kB 11:55
17.03 kB 11:55
1.13 kB 11:55
5.90 kB 11:55
66.51 kB 11:55
9.20 kB 11:55
4.30 kB 11:55
3.92 kB 11:55
26.35 kB 11:55
3.71 kB 11:55
12.75 kB 11:55
61.38 kB 11:55
5.57 kB 11:55
19.29 kB 11:55
6.04 kB 11:55
4.30 kB 11:55
4.44 kB 11:55
5.02 kB 11:55
3.86 kB 11:55
9.27 kB 11:55
6.91 kB 11:55
9.50 kB 11:55
8.47 kB 11:55
715.00 B 11:55
2.61 kB 11:55
4.55 kB 11:55
2.11 kB 11:55
5.85 kB 11:55
1.03 kB 11:55
3.25 kB 11:55
1.12 kB 11:55
439.00 B 11:55
928.00 B 11:55
18.01 kB 11:55
15.25 kB 11:55
2.19 kB 11:55
2.74 kB 11:55
475.00 B 11:55
2.02 kB 11:55
945.00 B 11:55
15.36 kB 11:55
19.15 kB 11:55
8.37 kB 11:55
27.39 kB 11:55
11.62 kB 11:55
1.65 kB 11:55
12.99 kB 11:55
1.96 kB 11:55
1.99 kB 11:55
7.28 kB 11:55
2.32 kB 11:55
4.72 kB 11:55
3.42 kB 11:55
3.22 kB 11:55
29.31 kB 11:55
7.50 kB 11:55
4.27 kB 11:55
7.59 kB 11:55
2.44 kB 11:55
10.51 kB 11:55
6.83 kB 11:55
2.64 kB 11:55
3.05 kB 11:55
728.00 B 11:55
10.59 kB 11:55
4.19 kB 11:55
1.91 kB 11:55
4.43 kB 11:55
1.15 kB 11:55
10.99 kB 11:55
2.13 kB 11:55
35.88 kB 11:55
17.91 kB 11:55
20.26 kB 11:55
43.66 kB 11:55
46.99 kB 11:55
5.97 kB 11:55
19.77 kB 11:55
5.09 kB 11:55
20.67 kB 11:55
3.00 kB 11:55
9.39 kB 11:55
20.94 kB 11:55
7.02 kB 11:55
11.36 kB 11:55
19.95 kB 11:55
18.42 kB 11:55
5.29 kB 11:55
3.89 kB 11:55
15.10 kB 11:55
987.00 B 11:55
25.78 kB 11:55
5.89 kB 11:55
10.90 kB 11:55
8.24 kB 11:55
29.11 kB 11:55
17.68 kB 11:55
4.79 kB 11:55
14.92 kB 11:55
4.98 kB 11:55
21.24 kB 11:55
14.53 kB 11:55
7.39 kB 11:55
3.36 kB 11:55
2.22 kB 11:55
9.00 kB 11:55
11.28 kB 11:55
6.55 kB 11:55
9.87 kB 11:55
10.10 kB 11:55
3.94 kB 11:55
12.34 kB 11:55
1.67 kB 11:55
50.86 kB 11:55
7.99 kB 11:55
37.38 kB 11:55
13.77 kB 11:55
23.17 kB 11:55
12.89 kB 11:55
33.84 kB 11:55
3.08 kB 11:55
5.61 kB 11:55
18.31 kB 11:55
1.65 kB 11:55
3.08 kB 11:55
4.88 kB 11:55
5.90 kB 11:55
49.50 kB 11:55
11.68 kB 11:55
30.03 kB 11:55
3.43 kB 11:55
12.82 kB 11:55
6.67 kB 11:55
21.10 kB 11:55
19.33 kB 11:55
5.75 kB 11:55
43.70 kB 11:55
1.26 kB 11:55
93.21 kB 11:55
3.83 kB 11:55
3.58 kB 11:55
14.45 kB 11:55
3.61 kB 11:55
32.85 kB 11:55
4.89 kB 11:55
5.67 kB 11:55
2.42 kB 11:55
12.89 kB 11:55
1.45 kB 11:55
4.12 kB 11:55
asm_cksum.S3.83 kB 11:55
4.75 kB 11:55
4.07 kB 11:55
12.64 kB 11:55
21.43 kB 11:55
723.00 B 11:55
11.03 kB 11:55
4.86 kB 11:55
41.56 kB 11:55
9.65 kB 11:55
12.87 kB 11:55
25.65 kB 11:55
34.09 kB 11:55
22.00 kB 11:55
10.01 kB 11:55
4.82 kB 11:55
65.15 kB 11:55
7.13 kB 11:55
33.48 kB 11:55
2.75 kB 11:55
15.35 kB 11:55
12.75 kB 11:55
6.11 kB 11:55
16.57 kB 11:55
13.78 kB 11:55
7.14 kB 11:55
3.63 kB 11:55
2.40 kB 11:55
11.03 kB 11:55
15.25 kB 11:55
3.55 kB 11:55
5.59 kB 11:55
32.29 kB 11:55
13.18 kB 11:55
20.91 kB 11:55
20.86 kB 11:55
5.85 kB 11:55
7.33 kB 11:55
4.83 kB 11:55
6.21 kB 11:55
2.10 kB 11:55
1.84 kB 11:55
7.57 kB 11:55
7.52 kB 11:55
21.18 kB 11:55
46.41 kB 11:55
1.90 kB 11:55
920.00 B 11:55
13.63 kB 11:55
26.15 kB 11:55
2.79 kB 11:55
linker.x12.29 kB 11:55
mem_init.mk11.56 kB 11:55
memory.gdb2.19 kB 11:55
public.mk18.52 kB 11:55
settings.bsp108.67 kB 11:55
124.79 kB 11:55
25.78 kB 11:55
625.00 B 22:31
7.59 kB 17:03
Sponsored links
Paper< Heterogeneous cellular networks with flexible cell of Association:a comprehensive downlink sinr analysis> Figure 4 simulation, you can run
Sent successfully!
niosii-ethernet-standard-3c120
Your Point(s)
Your Point isn't enough.
Get point immediately by PayPal
10 Points / $20
22 Points / $40
55 Points / $100
120 Points / $200
point will be added to your account automatically after the transaction.
Don't have an account？
Need any help?
切换到中文版？
^_^"Oops ...
Sorry!This guy is mysterious, its blog hasn't been opened, try another, please!
Favorite by