笔记本图纸_甜梦文库
笔记本图纸
54321755SA1 BLOCK DIAGRAMDCPU100/133/200MHZ CPUCLK CPUCLK#Pentium 4 Socket 478Vcore Page 3+3VTHERMALADM1032Page 3ECHOST BUS755SA1 P/N:DDRCLK0 DDRCLK1 DDRCLK2100/133/166MHZDDR RAM BUSSIS648CLK 100/133/200MHZ SIS648CLK# FWSDCLKO DDRCLK0# AGPCLK 66MHZ DDRCLK1# 648ZCLK 66/133MHZ DDRCLK2#DNorth BridgeSIS 648(FX)VDDQ +3V +2.5V +1.8V +1.5VDDR 2 +2.5VDDRCLK0# DDRCLK1# DDRCLK2#DDRCLK0 DDRCLK1 DDRCLK2AGPPage 6Page 9 +1.25V terminalPage 9 +1.25V terminal+2.5VDDR 1ATI M9+C+5V +2.5V +3V +1.5V Page 11CRT Page 16 LCD Page 17 S-Video TVPage 16HyperZip BUS AC Link PCI BUSAGPCLK1 66MHZIDESouth BridgeSIS 963Vcore +3V +1.8V Page 18+3V+5VRTC+3V Page 21AUDIO CODECVT1612A+3V +5V Page 23CMDCPage 27AMPLIFIERNS LM4835+5V Page 24MICPage 25RJ45/11963ZCLK 66/133MHZ 963PCICLK 33MHZ USB-48MHZ 963REF1 14.318MHZ 963REF3 33MHZLAN(PHY)REALTEK RTL8201BLPage 27HDDRJ45/112.5&+5VCD-ROM+5VPRIMARY SECONDARYMASTER MASTERCCRYSTAL24.576M HZCRYSTAL25M HZINTERNAL SPKPage 24PHONE JACK * 2Page 25CRYSTAL24.576M HZIEEE-1394TSB43AB22+3V Page 26CRYSTAL32.768KCRYSTAL12M HZPCLK_CB 33MHZTI1410+3V +5V +12V Page 221394 CONN+5VUSB1-3Page 28CARD READERPage 28WIRELESS CONNPage 28CRYSTAL14.318MHzBClock GenCPUCLK CPUCLK# SIS648CLK SIS648CLK# FWSDCLKAGPCLK 66MHZB68PIN-CONN100/133MHZ+3VLPC BUSAGPCLK1 66MHZ 648ZCLK 133MHZ 963ZCLK 133MHZ USB-48MHZ 393-48MHZ 963PCICLK 33MHZ PCLK_CB 33MHZ PCLK_M 33MHZ LPC_CLK 33MHZ PCLK_EC 33MHZ393-48MHZ LPC_CLK_33MHZLPCPC87383Page 29CRYSTAL32.768KPCLK_EC 33MHZK/B CONTROLLERNS PC97551+3V Page 31ICSICS952005ParallelFLASH ROM+5V +5VINT K/B T/P FAN CHARGER BATTERYPower Switch CONN & AC_IN.......Page 30DDRCLK0 DDRCLK0# DDRCLK1 DDRCLK1# DDRCLK2 DDRCLK2#Page 30 Page 25 Page 36 Page 36AAVcore......Page 32100/133/166MHZ963REF1 14.318MHZ 963REF3 33MHZ+3V Page 55Clock Buf ICSICS93722 +3V +2.5V Page 5+2.5V,+1.5V,+1.25V.......Page 33 +1.8V.......Page 34TitleUnwill International Corp.755SA1Size Date: Document Number 2410 Monday, December 08, 20031+3V,+5V.......Page 354 3 2RevSYSTEM BLOCK DIAGRAMSheet 1 of 38A54321RA to RB Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify Modify 1 : Change R371 to 3.48k_1 for +1.8V 2 : Remove C392 for +1.8V Power ON Sequence 3 : Modify for Schematic Error 4 : Change R414 to 0 ohm for +3v_ON Voltage Level 5 : Modify for Schematic Error 6 : Add 2200P for Switching Power Quality 7 : Change PR12 to 0 ohm for EC Voltage Level 8 : Modify R524 Connect to VCC_AMP for VR1 9 : Modify Schematic for S3 Power Sequence 10 : Add C660 for 648 Request 11 : Reserve C655,C656,C657,C658,C659,C661,C662 for 648 Request 12 : Add R830 470 ohm for HVREF 13 : Change PR2,PR4,PR6,PR8 for Total Power Accuracy 14 : Add R831 for CMOS Discharge Safety 15 : Remove 0 ohm for Software Bug 16 : Change Wireless CONN Pin Define for Design Issue 17 : Remove R for VRAM On Board 18 : Add 0 ohm for CPU Power Current Return Path 19 : Add Schematic and modify R557,R556 value for SPK volume 20 : Add Schematic for EC to select CPU frequency 21 : Add R839,R840 and DDR memory capacitance for DDR stability 22 : Add bypass capacitance for difference power plane 23 : Add capacitance for sis648 system stability 24 : Add capacitance for VGA system stability 25 : Add MEM_ID select for VRAM on Board 26 : Add for EC SMP fuction 27 : Improve Audio Signal Quality 28 : Add schematic for audio 29 : Modify for EMIDDCCBBAAUnwill International Corp.Title755SA1Size Date:5 4 3 2Document Number 2410 Monday, December 08, 2003RevREVISION HISTORYSheet1A2 of 3854321+1.2V30milTP45 TP44 TP47 TP42 R37 4.7K_OP ITP_CLK ITP_CLK# TP39TP46 TP3 CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 AE5 AE4 AE3 AE2 AE1 U10A CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 32 32 32 32 32 +1.2V BSEL0 BSEL1 AD2 Z0315 AF22 CPUCLK AF23 CPUCLK# L24 CPUCOM0 P1 CPUCOM#0 D1 E5 INTR NMI INTR NMI 18 18 R38 4.7K_OP STPCLK# CPUCLK 5 CPUCLK# 5 HTCK HTRST# CPUCOM0 CPUCOM#0 R125 R113 R92 R104 27 CPUSLP# 680 SMI# COMP0 COMP1 LINT0 LINT1 ADSTB0 ADSTB1 DBRESET STBP0 STBP1 STBP2 STBP3 STBN0 STBN1 STBN2 STBN3 DB#0 DB#1 DB#2 DB#3 REQ0 REQ1 REQ2 REQ3 REQ4 THERMDA THERMDC THERMTRIP BSEL0 BSEL1 VCC_SENSE VSS_SENSE 61.9_1 INIT# 61.9_1 IGNNE# INTR NMI HTMS HDSTBP#[0..3] 6 DBRESET CPURST# HTDO HDSTBN#[0..3] 6 HTDI ITP_CLK ITP_CLK# DBI#0 DBI#1 DBI#2 DBI#3 HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 THERMDA THERMDC THERMTRIP# 18 BSEL0 TP37 TP5 TP4 5,19 PM_CPU_STP# D13 BAT54 DPSLP# GHI# R26 R116 61.9_1 61.9_1 DBI#[0..3] 6 BSEL1 L L H H BSEL0 L Hi-Z L H Function 100MHz 133MHz RSVD RSVD BPM#3 BPM#4 BPM#2 BPM#5 TEST_GROUP0 TEST_GROUP1 TEST_GROUP2 R49 R50 R51 R54 R40 R31 R41 61.9_1 61.9_1 61.9_1 61.9_1 61.9_1 61.9_1 61.9_1 R124 R107 R119 R112 R27 R63 R120 R105 R24 R25 56.2_1 56.2_1 56.2_1 39 150_1 51.1_1 75_1 150_1CCPU_CORE TP2 TP1 TP49 +1.25V +1.2V FERR# BREQ0# PROCHOT# +3V R390 R42 1K 1K_OP R115 R106 R127 61.9_1 51.1_1 61.9_1 51.1_1 61.9_1 56.2_1 56.2_1 56.2_1 56.2_1 56.2_1D6 6 TP50DHA#[3..31] AF4 AF3 Z0305 HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 Z Z RS#[0..2] RS#0 RS#1 RS#2AC1 Z07ADS#AC26 AD26Z ZK2 K4 L6 K1 L3 M6 L2 M3 M4 N1 M1 N2 N4 N5 T1 R2 P3 P4 R3 T2 U1 P6 U3 T4 V2 R6 W1 T5 U4 V3 W2 Y1 AB1J26 K25 K26 L25CPUPWRGD R68 THERMTRIP# R123 A20M# R114 R70 R23 R118 R94TP48 18 FERR# 4,18 STPCLK# TP43 18 INIT# TP40 6 DBSY# 6 DRDY# 6 HTRDY# 6 ADS# 6 HLOCK# 6 BREQ0# 6 BNR# 6 HIT# 6 HITM# 6 BPRI# 6 DEFER#IERR# Z0312 FERR# STPCLK# Z0313 INIT# Z0314ADS# BREQ0#C18 18 18 18 6 6PROCHOT# IGNNE# SMI# A20M# CPUSLP# CPUPWRGD CPURST#HTCK HTDI HTMS HTRST# HTDO PROCHOT# IGNNE# SMI# A20M# CPUSLP# CPUPWRGD CPURST# TEST_GROUP0 TEST_GROUP1AC3 V6 B6 Y4 AA3 W5 AB2 H5 H2 J6 G1 G4 H6 G2 F3 E3 D2 E2 D4 C1 F7 E6 D5 C3 B2 B5 C6 AB26 AB23 AB25 AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6 AD25 AC6 AB5 AC4 Y6 AA5 AB4F1 G5 F4VCCVID VCCVIDPRGAP0 AP1ITP_CLK0 ITP_CLK1DEP0 DEP1 DEP2 DEP3HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HA32 HA33 HA34 HA35RS0 RS1 RS2IERR MCERR FERR STPCLK BINIT INIT RSP DBSY DRDY TRDY ADS LOCK BRO BNR HIT HITM BPR DEFER TCK TDI TMS TRST TDO PROCHOT IGNNE SMI A20M SLP PWRGOOD RESET TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI12 BPM0 BPM1 BPM2 BPM3 BPM4 BPM5VID0 VID1 VID2 VID3 VID4 VIDPWRGD BCLK0 BCLK1L5 HASTB#0 R5 HASTB#1 AE25 DBRESET F21 J23 P23 W23 E22 K22 R22 W22 E21 G25 P26 V21 J1 K5 J4 J3 H3 B3 C4 A2 AD6 AD5 BSEL1 A5 A4 Z HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3 HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3HASTB#[0..1] 61K 1KHREQ#[0..4] 6TEST_GROUP2CPU_GHI#R1170 GHI# DPSLP#BPM#2 BPM#3 BPM#4 BPM#5Modify 20+3VBBB21 HD0 B22 HD1 A23 HD2 A25 HD3 C21 HD4 D22 HD5 B24 HD6 C23 HD7 C24 HD8 B25 HD9 G22 HD10 H21 HD11 C26 HD12 D23 HD13 J21 HD14 D25 HD15 H22 HD16 E24 HD17 G23 HD18 F23 HD19 F24 HD20 E25 HD21 F26 HD22 D26 HD23 L21 HD24 G26 HD25 H24 HD26 M21 HD27 L22 HD28 J24 HD29 K23 HD30 H25 HD31 M23 HD32 N22 HD33 P21 HD34 M24 HD35 N23 HD36 M26 HD37 N26 HD38 N25 HD39 R21 HD40 P24 HD41 R25 HD42 R24 HD43 T26 HD44 T25 HD45 T22 HD46 T23 HD47 U26 HD48 U24 HD49 U23 HD50 V25 HD51 U21 HD52 V22 HD53 V24 HD54 W26 HD55 Y26 HD56 W25 HD57 Y23 HD58 Y24 HD59 Y21 HD60 AA25 HD61 AA22 HD62 AA24 HD63Reserve for Smart PowerR833 1K Q46 BSEL0 R834 0 Z2 FSB_SEL 31 FSB_SEL L H Function 133MHz 100MHzSOCKET478HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#636HD#[0..63] TP16 TP17 CPUCLK# CPUCLK31SMART_C2D3BAT54_OPSTPCLK#STPCLK# 4,1831SMART_SLPD4BAT54_OPCPUSLP#CPUSLP# 18CPU HOT THROTTLING/SHUT DOWN PROTECT CIRCUIT+3V R393 200 CPU_CORE C407 2.2U_X5R U41 Z0316 1A31SMART_C3D2BAT54_OPDPSLP#VCC D+ D-THERMDAR1220 C404 1000PZ18 3 4SMBCLK SMBDATA ALERT# GND8 7 6 5FAN_SMBCLK 5,31 FAN_SMBDATA 5,31R159 4.7K Z Z_OFF# 30,35ATHERM#PROCHOT#R1261K Z0319THERMDCR1210MAX6692/ADM1032Q13 2N3904C178 1U_10VQ14 2N3904Unwill International Corp.SMBus Address is 0x4CADM1032 or MAX6692 or LM86 Size Date:5 4 3 2Title755SA1Document Number 2410 Monday, December 08, 2003 RevP4 CPU1(Host)Sheet1A3 of 3854321CPU_CORE C59 220P A10 A12 A14 A16 A18 A20 A8 AA10 AA12 AA14 AA16 AA18 AA8 AB11 AB13 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 B9 C10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9 AA21 AA6 F20 F6 U10B C66 220P C77 220PCPUGTLVREFA CPUGTLVREFB C72CLOSE CPU220PGTLREF0 GTLREF1 GTLREF2 GTLREF3VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCCDDCH1 VSS H4 VSS H23 VSS H26 VSS A11 VSS A13 VSS A15 VSS A17 VSS A19 VSS A21 VSS A24 VSS A26 VSS A3 VSS A9 VSS AA1 VSS AA11 VSS AA13 VSS AA15 VSS AA17 VSS AA19 VSS AA23 VSS AA26 VSS AA4 VSS AA7 VSS AA9 VSS AB10 VSS AB12 VSS AB14 VSS AB16 VSS AB18 VSS AB20 VSS AB21 VSS AB24 VSS AB3 VSS AB6 VSS AB8 VSS AC11VSS AC13VSS AC15VSS AC17VSS AC19VSS AC2 VSS AC22VSS AC25VSS AC5 VSS AC7 VSS AC9 VSS AD1 VSS AD10VSS AD12VSS AD14VSS AD16VSS AD18VSS AD21VSS AD23VSS AD4 VSS AD8 VSS AE11 VSS AE13 VSS AE15 VSS AE17 VSS AE19 VSS AE22 VSS AE24 VSS AE26 VSS AE7 VSS AE9 VSS AF1 VSS AF10 VSS AF12 VSS AF14 VSS AF16 VSS AF18 VSS AF20 VSS AF26 SKTOCC# AF6 VSS AF8 VSS B10 VSS B12 VSS B14 VSS B16 VSS B18 VSS B20 VSS B23 VSS B26 VSS B4 VSS B8 VSS C11 VSS C13 VSS C15 VSS C17 VSS C19 VSS C2 VSSC25 C5 C7 C9 D10 D12 D14 D16 D18 D20 D21 D24 D3 D6 D8 E1 C22 E11 E13 E15 E17 E19 E23 E26 E4 E7 E9 F10 F12 F14 F16 F18 F2 F22 F25 F5 F8 G21 G24 G3 R23 R1 P5 P25 P22 R26 P2VCCIOPLL VCCAAE23 AD20VCCIOPLL C45 4.7U_10V_0805 VCCA_CPUR32QTCPU_COREVSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSR33QTVSSA VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSAD22 Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 U2 T6 T3 T24 T21 R4 G6 J2 J22 J25 J5 K21 K24 K3 K6 L1 L23 L26 L4 M2 M22 M25 M5 N21 N24 N3 N6C46 4.7U_10V_0805 VSS_CPUModify 3CPU_CORECPU_CORER61 49.9_1 CPUGTLVREFB 2/3VCORE C73 R67 1U_10V 100_1 1U_10V CPUGTLVREFA 2/3VCORER52 49.9_1CC63R48 100_1CPU_CORE C89 C50 C47 C49 C48 C100 4.7U_10V_U_10V_U_10V_U_10V_U_10V_U_10V_0805SOCKET478C101 4.7U_10V_0805Z0402Z0403CPU_COREBZ0404C137 C134 C135 C90 C136 4.7U_10V_U_10V_U_10V_U_10V_U_10V_0805BFor Prescoot Processor UseR35 STPCLK# 3,18 R39 Q35 31 BAT_THROT_EN Z0406 +3V R453 1K ZN2 0 R36 C84 0_OP 1U_10V 1U_10V 1U_10V 1U_10V 1U_10V 1U_10V 1U_10V 1U_10V 0.1u 0.1u C104 C105 C85 C131 C96 C97 C132 C52 C51 49.9_1_OP TP38Q33 2N,35 +3V AC_INZ 74AHC14_1G 4 SUS_CLK R446 3 1 33K_1 Z08 Q34 2 2N R841 0ABAT54Modify 18C103 0.1uC102 0.1uC86 0.1uC87 0.1uAModify 5Unwill International Corp.C447 680P Size Date:5 4 3 2Title755SA1Document Number 2410 Monday, December 08, 2003 RevP4 CPU2(Power)Sheet1A4 of 3854321Main Clock Generator+3V_VDDA +3V B57DPlace near to the Clock Outputs Place near to the Clock OutputsCPUCLK CPUCLK# CPUCLK 3 CPUCLK# 3 SiS648CLK 6 SiS648CLK# 6 AGPCLK C238 C239 C312 C294 C295 C309 C313 C310 C293 C261 C341 C314 10P 10P 10P 10P 10P 10P 10P 10P 10P 10P 10P 10P SiS648CLK SiS648CLK# R225 R226 R223 R224 49.9_1 49.9_1DU30 1 11 13 19 28 29 42 48 5 8 18 24 25 32 41 46QTHC_3A_ C296 C249 0.1u 4.7U_10V_U_10V_.1u C256 0.1u C248 0.1u C290 0.1u C291 0.1u C273 0.1u C292 0.1u++VDDREF VDDZ VDDPCI VDDPCI VDD48 VDDAGP VDDCPU VDDSD VSSREF VSSZ VSSPCI VSSPCI VSS48 VSSAGP VSSCPU VSSSDCPUCLK0 CPUCLK#0 CPUCLK1 CPUCLK#1 SDCLK AGPCLK0 AGPCLK1 ZCLK0 ZCLK140 39 44 43 47 31 30 9 10 14 15 16 17 20 21 22 23 2 3 4 27 26Z ZR239 R240 R237 R23833 33 33 33CPUCLK CPUCLK# SIS648CLK SIS648CLK#49.9_1 49.9_1Z Z FS3 FS4 Z Z0520R241 R242 R314 R291 R316 R292 R317 R293 R294 R290 R313 R24922 22 22 22 22 22 22 22 22 22 22 22AGPCLK AGPCLK1 648ZCLK 963ZCLK PCLK_EC PCICLK PCLK_CB LPC_CLK 963REF1 IO_CLK USB-48MAGPCLK 6 AGPCLK1 11 648ZCLK 963ZCLK 7 18AGPCLK1 648ZCLK 963ZCLK PCICLK PCLK_CB PCLK_EC LPC_CLK 963REF1+3V+3VModify 15R312 10K Z0504 CPU_CORE R340 10K 0_OP ZN3904_OP R243 Q19 2N3904_OP +3V B53 QTHC_3A_CFOR CYPRESS R336R335 10K19 PCI_STP# 3,19 PM_CPU_STP#R315 PCI_STP# PM_CPU_STP# R2360_OP Z_OP Z05 33 475_1 Z0506 38PCICLK_F0/FS3 PCICLK_F1/FS4 PCICLK0 PCICLK1 PCICLK2 PCI_STOP# PCICLK3 CPU_STOP# PCICLK4 PCICLK5 PD#/VTT_PWRGD IREF REF0/FS0 REF1/FS1 REF2/FS2 48M 24_48M/MULTISELPCLK_EC 31 PCICLK 18 PCLK_1394 26 PCLK_CB 22 LPC_CLK 29 963REF1 IO_CLK 19 29FS0 FS1 FS2 Z0521 MULTISELUSB_48M IO_CLK PCLK_139425MILC245 0.1uZ0 0.01u 37USB_48M 20VDDA0.1uSCLK SDATA XOUT VSSA XIN35 34CK_SM_CLK CK_SM_DATACICS Y2 ZP 14.318MHz_DIP Z(3 1: 2: 3.OPTIONS) (ICS) (Cypress) (Hitachi)MULTISEL 10PR2290_OP+3VFrequency SelectionR287 R309 R310 R311 R288 2.7K_OP FS0 CBVDD 2.7K_OP FS1 2.7K_OP FS2 2.7K_OP FS3 2.7K FS4 CK_SM_CLK R305 CK_SM_DATAR304 3 12 23 10 0 Z Z 9 FB_OUT R211 R212 0 0 CK_SM_CLK CK_SM_DATA 20 21 U33 VDD VDD VDD VDD SCLK SDATA CLKIN CLKIN# FB_IN FB_IN# GND GND GND GND CLK#0 CLK#1 CLK#2 CLK#3 CLK#4 CLK#5 FB_OUT FB_OUT# CLK0 CLK1 CLK2 CLK3 CLK4 CLK5 2 4 13 17 24 26 1 5 14 16 25 27 19 18 Z Z Z Z Z Z Z R286 R327 R318 R284 R278 R274 R299 R331 R330 R281 R273 R306 22 C302 10P ICS 0 0 0 0 0 0 0 0 0 0 DDRCLK0 DDRCLK3 DDRCLK2 DDRCLK1 DDRCLK4 DDRCLK5 DDRCLK#0 DDRCLK#3 DDRCLK#2 DDRCLK#1 DDRCLK#4 DDRCLK#5 FB_OUT DDRCLK0 DDRCLK3 DDRCLK2 DDRCLK1 DDRCLK4 DDRCLK5 DDRCLK#0 DDRCLK#3 DDRCLK#2 DDRCLK#1 DDRCLK#4 DDRCLK#5 9 9 9 9 9 9 9 9 9 9 9 9Place near to the Clock BufferClock Buffer (DDR)Place near to the Clock BufferDDRCLK0 DDRCLK1 DDRCLK2 DDRCLK3 DDRCLK4 DDRCLK5 DDRCLK#0 DDRCLK#1 DDRCLK#2 DDRCLK#3 DDRCLK#4 DDRCLK#5 FB_OUT C279 C319 C327 C287 C284 C277 C276 C331 C336 C301 C280 C272 C307 10P 10P 10P 10P 10P 10P 10P 10P 10P 10P 10P 10P 10PBB7 FWDSDCLKO 9,19 SB_SM_CLK 9,19 SB_SM_DATA 3,31 FAN_SMBCLK 3,31 FAN_SMBDATA R227 R228 0 06 11 15 28Place near to the Clock Buffer+2.5VS B55 QTHC_3A_0805 + C266 + C269 C282 0.1u 4.7U_10V_U_10V_.1u C298 0.1u CBVDDFUNCTIONALITY BIT6 0 0 0 0 0 BIT5 1 1 1 1 1 FS4 1 1 1 1 1 FS3 0 0 0 0 0 FS2 0 1 1 0 0 FS1 0 0 1 0 1 FS0 0 1 1 1 1 CPU DDR_RAM 100 100 133.3 133.3 133.3 166.67 100 133 100 167 AGP 66.67 66.67 66.67 66.67 66.67 PCI 33.3 33.3 33.3 33.3 33.3 ZCLK 133.3 133.3 133 133.3 133AAUnwill International Corp.Title755SA1Size Date:5 4 3 2Document Number 2410 Monday, December 08, 2003RevCLOCK GEN ICS952005Sheet1A385of54321Modify 223 HD#[0..63] HD#[0..63] HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0 C24 E23 B24 D23 D25 F24 C26 B25 B26 D27 D26 E27 B27 D28 C28 B28 E29 F28 B29 C30 B30 B31 C32 D29 C33 B33 B35 D32 B34 E31 D31 D33 D35 G31 C35 F33 E33 D34 E35 F32 J34 G34 H35 F35 J33 J31 G35 H33 J35 K32 N33 K33 L31 L33 K35 L35 M35 M33 P32 P33 L34 N34 N35 P35 U28A HD63# HD62# HD61# HD60# HD59# HD58# HD57# HD56# HD55# HD54# HD53# HD52# HD51# HD50# HD49# HD48# HD47# HD46# HD45# HD44# HD43# HD42# HD41# HD40# HD39# HD38# HD37# HD36# HD35# HD34# HD33# HD32# HD31# HD30# HD29# HD28# HD27# HD26# HD25# HD24# HD23# HD22# HD21# HD20# HD19# HD18# HD17# HD16# HD15# HD14# HD13# HD12# HD11# HD10# HD9# HD8# HD7# HD6# HD5# HD4# HD3# HD2# HD1# HD0# HA31# HA30# HA29# HA28# HA27# HA26# HA25# HA24# HA23# HA22# HA21# HA20# HA19# HA18# HA17# HA16# HA15# HA14# HA13# HA12# HA11# HA10# HA9# HA8# HA7# HA6# HA5# HA4# HA3# CPUCLK CPUCLK# CPURST# CPUPWRGD ADS# BREQ0# BPRI# BNR# HLOCK# HIT# HITM# DEFER# HTRDY# DRDY# DBSY# DBI3# DBI2# DBI1# DBI0# HDSTBP3# HDSTBP2# HDSTBP1# HDSTBP0# HDSTBN3# HDSTBN2# HDSTBN1# HDSTBN0# RS#2 RS#1 RS#0 HVREF0 HVREF1 HVREF2 HVREF3 HVREF4 AH33 AG33 AJ35 AF32 AJ34 AH32 AG35 AE31 AH35 AF35 AE35 AE33 AE34 AF33 AG34 AC33 AD32 AD33 AC35 AD35 AC31 AC34 AB35 AB32 AB33 AA35 AA31 Y32 AA34 AJ31 AJ33 B23 F22 V35 U31 R34 V33 T33 U34 R35 T35 V32 W34 U33 F26 B32 E34 R31 E25 D30 H32 M32 D24 F30 G33 N31 R33 T32 U35 AA26 W26 U26 R26 L20 HA#31 HA#30 HA#29 HA#28 HA#27 HA#26 HA#25 HA#24 HA#23 HA#22 HA#21 HA#20 HA#19 HA#18 HA#17 HA#16 HA#15 HA#14 HA#13 HA#12 HA#11 HA#10 HA#9 HA#8 HA#7 HA#6 HA#5 HA#4 HA#3 SiS648CLK SiS648CLK# CPURST# CPUPWRGD ADS# BREQ0# BPRI# BNR# HLOCK# HIT# HITM# DEFER# HTRDY# DRDY# DBSY# DBI#3 DBI#2 DBI#1 DBI#0 HDSTBP#3 HDSTBP#2 HDSTBP#1 HDSTBP#0 HDSTBN#3 HDSTBN#2 HDSTBN#1 HDSTBN#0 RS#2 RS#1 RS#0 DBI#[0..3] 3 11 AC/BE#[0..3] AC/BE#[0..3] SiS648 HA#[3..31] HA#[3..31] 3 AGP_VDDQ AAD[0..31] AGP_VDDQ U28B AGNT# AGPRBF# AGPWBF# AREQ# AFRAME# ATRDY# AGPPAR ASTOP# 8 1 R255 7 2 6 3 R247 5 4 RP15 8P4RX8.2K_OP R271 8 1 7 2 R215 6 3 5 4 RP28 8P4RX8.2K_OP R265 R275 R277 AAD0 AAD1 AAD2 AAD3 AAD4 AAD5 AAD6 AAD7 AAD8 AAD9 AAD10 AAD11 AAD12 AAD13 AAD14 AAD15 AAD16 AAD17 AAD18 AAD19 AAD20 AAD21 AAD22 AAD23 AAD24 AAD25 AAD26 AAD27 AAD28 AAD29 AAD30 AAD31 AGPCLK AFRAME# AIRDY# ATRDY# ASTOP# ADEVSEL# ASERR# AREQ# AGNT# AC/BE#3 AC/BE#2 AC/BE#1 AC/BE#0 Y5 W4 V2 W6 V4 U2 V5 U4 R2 T4 R3 T5 P2 R4 N2 R6 L3 L4 K2 L6 J2 J3 K4 J4 J6 H4 G3 H5 F2 G4 E2 G6 D8 N6 M4 N4 M2 L2 P5 C6 E8 K5 M5 P4 U6 AAD0/VBD7 SBA7 AAD1/VBD6 SBA6 AAD2/VBD5 SBA5 AAD3/VBD4 SBA4 AAD4/VBD3 SBA3 AAD5/VBD2 SBA2 AAD6/VBD1 SBA1 AAD7/VBD0 SBA0/VBCLK AAD8/VAD6 AAD9/VAD5 ST0 AAD10/VAD4 ST1 AAD11/VAD7 ST2 AAD12/VAD8 AAD13/VAD9 ADBIL AAD14/VAD10 ADBIH/PIPE#/VGPIO3 AAD15/VAD11 AAD16/VADE AGP8XDET# AAD17/VAVSYNC AAD18/VAHSYNC APAR AAD19/VBD11 AGP 8x AAD20/VBD10 WBF#/VGPIO2 AAD21/VBD8 RBF#/VBHCLK AAD22/VBD9 AAD23/VAD1 AD_STB0/VAGCLK AAD24/VAD0 AD_STB0#/VAGCLK# AAD25/VAD2 1.5V AAD26/VAD3 AD_STB1/VBGCLK AAD27/VBDE AD_STB1#/VBGCLK# AAD28/VBCTL0 AAD29/VBCTL1 SB_STB AAD30/VBHSYNC SB_STB# AAD31/VBVSYNC AGPCOMP_P AGPCOMP_N 3.3V AGPCLK AGPVREF AFRAME# AGPVSSREF AIRDY# ATRDY# A1XAVDD ASTOP# A1XAVSS ADEVSEL# ASERR# A4XAVDD AREQ#/VBCAD A4XAVSS AGNT# E3 F4 D2 F5 E4 B2 E6 B3 B6 F7 B5 D6 C4 C7 N3 B4 D7 T2 U3 G2 H2 C2 D3 W2 Y2 W3 Y4 B8 C8 A7 B7 AL36 AK34 AJ36 AK35 A1XAVDD A1XAVSS A4XAVDD A4XAVSS C1XAVSS C1XAVDD C4XAVSS C4XAVDD SBA7 SBA6 SBA5 SBA4 SBA3 SBA2 SBA1 SBA0 ST0 ST1 ST2 DBI_LOW AGPPIPE# GC_DET# AGPPAR AGPWBF# AGPRBF# AGPADSTB0 AGPADSTB#0 AGPADSTB1 AGPADSTB#1 SB_STB SB_STB# AGPCOMP_P AGPCOMP_N AGPVREFGC AGPPAR 11 R210 0 AGPWBF# 11 AGPRBF# 11CC667220P+3VAAD[0..31] 11SBA[0..7]DSBA[0..7]11D8.2K_OP AGPADSTB1 8.2K_OP SB_STB 8.2K_OP AGPADSTB0 8.2K_OP DBI_LOW 8.2K_OP AIRDY# 8.2K_OP ADEVSEL# 8.2K_OP ASERR#ST[0..2]ST[0..2]11 AGP_VDDQ648 HostDBI_LO DBI_HI11 11R199 4.7K_OPModify 22SiS648CLK SiS648CLK# SiS648CLK 5 SiS648CLK# 5 CPURST# 3 CPUPWRGD 3 ADS# BREQ0# BPRI# BNR# HLOCK# HIT# HITM# DEFER# HTRDY# DRDY# DBSY# 3 3 3 3 3 3 3 3 3 3 3 AGP_VDDQ 66MHz R283 324_1 AGPVREFGC C299 R289 100_1 0.1u 5 11 11 11 11 11 11 11 AGPCLK AFRAME# AIRDY# ATRDY# ASTOP# ADEVSEL# AREQ# AGNT# T1 T2 +1.8V C689 220P_OP +3V648CAGPADSTB0 11 AGPADSTB#0 11 AGPADSTB1 11 AGPADSTB#1 11 SB_STB 11 SB_STB# 11T3AGPCLK350mv20 milAGPCOMP_N 49.9_1 AGPCOMP_P 40.2_1AGP_VDDQ3.3VR282 R280BBHNCVREF pin B22 648 648FX3 3Voltage Divider NCAC/BE3# AC/BE2# AC/BE1# AC/BE0#C1XAVSS C1XAVDD C4XAVSS C4XAVDD20 milHDSTBP#[0..3] 3 +3V HDSTBN#[0..3] 3 CPU_CORE RS#[0..2] 3 R198 0 C220 0.01u C1XAVDD C212 +3V R218 0 C240 0.01u A1XAVDD C232 +3V R230 0 C243 0.01u A4XAVDD C242HASTB#[0..1] HREQ#[0..4] HASTB#1AG31 HASTB#0 AA33 HREQ#4 W35 HREQ#3 Y33 HREQ#2 W31 HREQ#1 W33 HREQ#0 Y35 HPCOMP D22 HNCOMP C22 HNCVREF B22 HADSTB1# HADSTB0# HREQ4# HREQ3# HREQ2# HREQ1# HREQ0# HCOMP_P HCOMP_N HCOMPVREF_N SiS648C655 4.7U_10V_0805_OPCPU_CORE0.1u C1XAVSSC656 25 mil 4.7U_10V_0805_OP0.1u A1XAVSSC657 25 mil 4.7U_10V_0805_OP25 mil0.1u A4XAVSSModify 11C165 HVREF HVREF 2/3 Vcore C176 0.1u 0.01u 75_1 R181 C185 0.01u 150_1 470 R830 C658 4.7U_10V_0805_OP C207 0.01u C205 +3V R194 30 mil width 10mil space 0 R179Modify 11Modify 11AR161AC173 0.01u HNCVREF 1/3 Vcore150_1C4XAVDD30 milR182 75_1 C179 0.01u20 milRds-on(n) = 10 ohm HNCOMP R178 HPCOMP R180 Rds-on(p) = 56 ohm CPU_CORE 20_1 110_125 milUnwill International Corp.Title20 mil5R178 648 20 1% 648FX 14 1%4R180 110 1% 100 1%0.1u C4XAVSS755SA1Size Document Number 2410 Monday, December 08, 2003 RevCLOSE 648Modify 123Modify 11Date:2SiS648 (HOST&AGP)Sheet1Aof 38654321MA[0..14] 10 MD[0..63] MD[0..63] MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7DMA[0..14]10U28C AN35 AP36 AK33 AM33 AN34 AK32 AR34 AN33 AM32 AL31 AR31 AL30 AN32 AR33 AN31 AM31 AP30 AR30 AM29 AL27 AN30 AN29 AL28 AN28 AP26 AN25 AR24 AL24 AL25 AR26 AM25 AN24 AN21 AP20 AN20 AL18 AM21 AR21 AL19 AM19 AL15 AL14 AN15 AR15 AN16 AM15 AN14 AL13 AM13 AL12 AL11 AR12 AP14 AR14 AN13 AP12 AL10 AR11 AM9 AR9 AM11 AN11 AP10 AN9 AL17 AR19 AN19 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 SRAS# SCAS# SWE# NB Hardware Trap Table MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 NC/MA15 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 AR23 AN23 AN22 AM23 AL23 AL26 AN26 AN27 AR27 AR28 AP22 AN18 AR22 AP28 AM27 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 MA14 ZAD[0..16] DLLEN# DRAM_SEL TRAP0 TRAP1 TEST1 TEST2 0 enable PLL SDR normal partial-swing mode Type Select II Type Select III 1 disable PLL DDR NB debug mode full-swing mode Disable Disable Default 0 1(DDR) 0 0 0 0 U28D ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 AH5 AK2 AJ4 AJ6 AH2 AH4 AG3 AG6 AF4 AG2 AF5 AG4 AD2 AE6 AE2 AE4 AL3 ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 ZCLK ZUREQ ZDREQ ZSTB0 ZSTB0# ZSTB1 ZSTB1# ZVREF Z1XAVDD Z1XAVSS Z4XAVDD Z4XAVSS ZCOMP_N ZCOMP_P SiS648 TRAP1 TRAP0 TESTMODE2 TESTMODE1 TESTMODE0 DLLEN# ENTEST NC/ROUT NC/GOUT NC/BOUT NC/HSYNC NC/VSYNC NC/VCOMP B12 B13 A13 A11 B11 E15 A15 E13 C11 D15 C10 E14 D13 C12 D14 C13 B14 C14 B15 C15 AN2 Z0702 AM4 AN3 F9 D10 C9 B9 B10 E10 D9 R345 0 PCIRST# PCIRST# 19,31 19,31 11,18,21,22,26,27,29,31 ZAD[0..16] 18DMD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 C192 R190 0.01u 150_1 DDRVREFB R191 150_1BENTEST R217 PWROK C354 AUXOK C360 0_OP DQM[0..7]4.7K 0.1u 0.1u1.8VNC/VOSCI NC/VGPIO0 NC/VGPIO1 NC/VRSET NC/INT#A NC/VVBWN NC/DACAVDD1 NC/DACAVSS1 NC/DACAVDD2 NC/DACAVSS2 NC/ECLKAVDD NC/ECLKAVSS NC/DCLKAVDD NC/DCLKAVSS PCIRST# PWROK AUXOKAL33 Z AR35 AR32 AL29 AP24 AL20 AP16 AN12 AN10 AP34 AP32 AR29 AR25 AR20 AR16 AR13 AR10 AL22 AL21 AM17 AL16 AN17 AR17 AP18 AR18 AP4 AT3 AR3 AP3 AR2 AN4 AP2 AF16 AF23 AR8 AP8 AP1 AL35 AL34 AM35 AN36 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 SDRCLK FWDSDCLK CS#0 CS#1 CS#2 CS#3 CS#4 CS#5 CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 S3AUXSW# DDRVREFA DDRVREFB DDRCOMP_P DDRCOMP_N DRAM_SEL DLLAVDD DLLAVSS DDRAVDD DDRAVSSDQM[0..7] 10 T21 133MHz 648ZCLK648 Memory5 DQS[0..7] DQS[0..7] 10 18 18 18 18 18 18648ZCLK ZUREQ ZDREQ ZSTB0 ZSTB#0 ZSTB1 ZSTB#1648ZCLK AL6 ZUREQ ZDREQ ZSTB0 ZSTB#0 ZSTB1 ZSTB#1 ZVREF AL4 AK5 AJ2 AJ3 AE3 AF2 AK4648 MuTIOL+2.5VSC338 0.01uCR337 150_1 DDRVREFADQS0/CSB0# DQS1/CSB1# DQS2/CSB2# DQS3/CSB3# DQS4/CSB4# DQS5/CSB5# DQS6/CSB6# DQS7/CSB7# SDRCLKI/DRAMTEST FWDSDCLKO CS0# CS1# CS2# CS3# CS4# CS5# CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 S3AUXSW#/CKE6 DDRVREFA DDRVREFB DDRCOMP_P DDRCOMP_N NC/DRAM_SEL/TRAP2 DLLAVDD DLLAVSS DDRAVDD DDRAVSSPWROK AUXOK TRAP1 TRAP0 648TEST2 648TEST1 648TEST0 DLLEN# ENTESTCLOSE TO NBPWROK AUXOK T17 T16 T14 T10 T11 T22R301 R3080 22 FWDSDCLKO C330 10P FWDSDCLKO 5C318 0.01uR329 150_1Z1XAVDD AN1 Z1XAVSS AM2 Z4XAVDD AL2 Z4XAVSS AL1 ZCOMP_N AD5 ZCOMP_P AD4CCS#[0..3] T34 T35CS#[0..3]10+2.5VS+3VS +3V CKE[0..3] T5 T25 S3AUXSW# 22,29,31 CKE[0..3] 9,10 25MIL Z1XAVDD R343 C343 4.7K S3AUXSW# VDDZ_1.8 25MIL R300 56 ZCOMP_N Z1XAVSS 0.1u C339 0.01u C659 4.7U_10V_0805_OP R338 0MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 SRAS# SCAS# SWE#Modify 11C201 0.01uR29756ZCOMP_P +3VBT26 DDRCOMP_N R334 DDRCOMP_P R333 40.2_1 40.2_125MIL Z4XAVDD C320 +2.5VS Z4XAVSS 0.1u C329 0.01uR3320C660 4.7U_10V_080510 10 10SRAS# SCAS# SWE#Modify 10SiS648 VDDZ_1.8R328 +3V 25MIL DLLAVDD C224 0.1u DLLAVSS C226 0.01u DDRAVSS 49.9_1 R213 0 25MIL DDRAVDD C237 0.1u C241 0.01u R220 0 +3V 150_1 C662 4.7U_10V_0805_OP R307C317 0.1u ZVREF 20 MilC661 4.7U_10V_0805_OP1/4 0.45V C304 0.1uAModify 11AModify 11Unwill International Corp.Title755SA1Size Date:5 4 3 2Document Number 2410 Monday, December 08, 2003RevSiS648 (DDR/MuTIOL)Sheet1Aof 38754321VDDZ_1.8CPU_CORE Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y22 Y23 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22 AB23 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC22 AC23 P14 P15 P16 P17 P18 P19 P20 P21 P22 W36 Y34 AA32 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSW24 V13 U24 T13 R24 N22 Y13 N15 N20N16 N18 N19 N21 N23 N24 P13 P24 N14 N13 V24U28E M20 N25 P25 L25 L26 M18 M19 M21 M22 M23 M24 M25 M26 R25 T25 U25 V25 W25 Y25 AA25 A17 A18 A19 A20 A21 B17 B18 B19 B20 B21 C17 C18 C19 C20 C21 D17 D18 D19 D20 D21 E17 E18 E19 E20 E21 F17 F18 F19 F20 F21 NC/VTT/VTT NC/VTT/VTT NC/VTT/VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTTU28FIVDD/PVDD IVDD/PVDD IVDD/PVDD IVDD/PVDD IVDD/PVDD IVDD/PVDD IVDD/PVDD IVDD/PVDD NC/IVDD/PVDDIVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD1.8V_MainDIVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD NC/IVDD/IVDD NC/IVDD NC/IVDD NC/IVDD NC/IVDD NC/IVDD VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDZ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQW13 Y24 AA24 AB13 AC24 AD13 AD15 AD17 AD19 AD21 AD23 AD24 R13 U13 AA13 T24 C16 B16 D16 E16 F15 AD3 AE1 AF3 AG1 AH3 AJ1 AK3 AM3 W11 W12 Y11 Y12 AA12 AA1 AA2 AA3 AA4 AA5 AA6 AB1 AB2 AB3 AB4 AB5 AB6 AC1 AC2 AC3 AC4 AC5 AC6 L11 L12 L13 M11 M12 M13 M14 M15 M16 N11 N12 R12 T12 U12 V12 P12 AB12 AC12 D4 D5 AM5 AM34 F13 F11 E11 D11 E12 D12 Z0802 B62 QT +1.8VS +3VS VDDZ_1.8Power1.8V648AGP_VDDQ1.8V for sis661FXCT13 +3VZ0801A9 L17 M17 N17 AE14 AE15 AB25 AL7 AL8 AL9 AM6 AM7 AM8 AN5 AN6 AN7 AN8 AP5 AP6 AP7 AR4 AR5 AR6 AR7 AT4 AT5 AT6 AT7 AD22 AD20 AD18 AD16 AD14 AC13NC VDD3.3 VDD3.3 VDD3.3VDDM_2.5BNC/VDDM/VDDM NC/VDDM/VDDM NC/VDDM/VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM VDDM+1.8VS C355 0.1u+3VS C348 0.1u SiS648NC/VDDQ/VDDQAUXAUX1.8/AUX_IVDD AUX3.3 NC NC NC NC NC NC NC NC/LSYNC NC/RSYNC NC/CSYNC SiS6482.5_DIMMAB24 VDDM AC25VDDM AD12VDDM AD25VDDM AE11 VDDM AE12 VDDM AE13 VDDM AE16 VDDM AE17 VDDM AE18 VDDM AE19 VDDM AE20 VDDM AE21 VDDM AE22 VDDM AE23 VDDM AE24 VDDM AE25 VDDM AE26 VDDM AF11 VDDM AF12 VDDM AF25 VDDM AF26 VDDMZ Z Z Z0809T23 T19 T24 T18 T15 T20 T12AP19 VSS AP21 VSS AP23 VSS AP25 VSS AP27 VSS AP29 VSS AP31 VSS AP33 VSS AP35 VSS AT8 VSS AT10 VSS AT12 VSS AT14 VSS AT16 VSS AT18 VSS AT20 VSS AT22 VSS AT24 VSS AT26 VSS AT28 VSS AT30 VSS AT32 VSS AT34 VSS AL32 VSS A22 VSS A24 VSS A26 VSS A28 VSS A30 VSS A32 VSS A34 VSS C23 VSS C25 VSS C27 VSS C29 VSS C31 VSS C34 VSS C36 VSS E22 VSS E24 VSS E26 VSS E28 VSS E30 VSS E32 VSS E36 VSS F34 VSS G32 VSS G36 VSS H34 VSS J32 VSS J36 VSS K34 VSSA3 A5 C1 C3 C5 E1 E5 E7 E9 F3 G1 G5 H3 J1 J5 K3 L1 L5 M3 N1 N5 P3 R1 R5 T3 U1 U5 V3 W1 W5 Y3 AE5 AG5 AJ5 AL5 AC32 AC36 AD34 AE32 AE36 AF34 AG32 AG36 AH34 AJ32 AM10 AM12 AM14 AM16 AM18 AM20 AM22 AM24 AM26 AM28 AM30 AP9 AP11 AP13 AP15 AP17 U32 U36 V34 W32648 GroundVDDQ_MainVSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS/NC VSSAA36 AB34 P23 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 U14 U15 U16 U17 U18 U19 U20 U21 U22 U23 V14 V15 V16 V17 V18 V19 V20 V21 V22 V23 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23 L32 L36 M34 N32 N36 P34 R32 R36 T34DCPU_Core 3.3VCAGP_VDDQB+C345 4.7U_10V_0805+C340 4.7U_10V_0805C326 0.1uC315 0.1uC306 0.1uC283 0.1uC303 0.1uC268 0.1uC270 0.1uC285 0.1uModify 23VDDZ_1.8 +3VModify 23+ C150 0.1u C153 1U_10V C670 4.7U_10V_ + C357 4.7U_10V_.1u C332 0.1u C356 0.1u C353 0.1u C308 0.1u C189 0.1u C191 0.1u C349 0.1u C668 4.7U_10V_.7U_10V_08054.7U_10V_0805Place to Bottom sidePlace to Bottom sideACPU_COREPlace to Bottom side+ C161 + C156 C163 C160 C155 0.1u C158 0.1u C154 0.1u C152 0.1u C671 4.7U_10V_0805VDDM_2.5DDR_2.5 C369 0.1u C373 0.1u C334 0.1u C174 0.1u C225 0.1u C347 0.1u C202 0.1u C208 0.1uPlace to Bottom side4.7U_10V_ C672 C673 4.7U_10V_U_10V_0805A+C162 4.7U_10V_0805+C166 4.7U_10V_0805+4.7U_10V_U_10V_V 1U_10VModify 23 Modify 23TitleUnwill International Corp.755SA1Size Date: Document Number 2410 Monday, December 08, 20031RevSiS648 (POWER)Sheet 8 of 38A5432ABCDRCS#0 RCS#1 RCS#2 RCS#355A1CKE0 CKE1 CKE2 CKE35 5 5 5 5 5 DDRCLK0 DDRCLK#0 DDRCLK1 DDRCLK#1 DDRCLK2 DDRCLK#2 59 52 113 RDQM0 RDQM1 RDQM2 RDQM3 RDQM4 RDQM5 RDQM6 RDQM7 TP88 DDRCLK0 DDRCLK#0 DDRCLK1 DDRCLK#1 DDRCLK2 DDRCLK#2 TP87 97 107 119 129 149 159 169 177 Z DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 NC/DM8RDQS0 RDQS1 RDQS2 RDQS3 RDQS4 RDQS5 RDQS6 RDQS7 RMA11 RMA12 Z090248 43 202 41 201 130 37 200 32 199 125 29 122 27 141 118 115 103 TP94RMA0 RMA1 RMA1 RMA2 RMA2 RMA3 RMA4 RMA4 RMA5 RMA5 RMA6 RMA7 RMA8 RMA9 RMA10 RMA13 RMA14 Z0901TP93A0 A1 A1_L A2 157 /CS0 A2_L 158 /CS1 A3 191 /CS0_L(CS2) A4 192 /CS1_L(CS3) A4_L A5 21 CKE0 A5_L 111 CKE1 A6 188 CKE0_L(CKE2) A7 187 CKE1_L(CKE3) A8 A9 5 DQS0 A10 14 DQS1 A11 25 DQS2 A12 36 DQS3 A13 56 DQS4 67 DQS5 BA0 78 DQS6 BA1 86 BA2 Z0918 47 DQS7 DQS8DDRCLK3 DDRCLK#3 DDRCLK4 DDRCLK#4 DDRCLK5 DDRCLK#5DDRCLK0 DDRCLK#0 DDRCLK1 DDRCLK#1 DDRCLK2 DDRCLK#244TP77 TP78 TP76 TP75 TP73 TP71 DDRCLK#5 DDRCLK5 DDRCLK#4 DDRCLK4 DDRCLK#3 DDRCLK3 10 10 10 RMD[0..63] RDQS[0..7] RDQM[0..7] 10 10 10 10 10 7,10 RCS#[0..3] RMA[0..14] RSRAS# RSCAS# RSWE# CKE[0..3] 5,19 SB_SM_CLK 5,19 SB_SM_DATA DDRCLK#5 DDRCLK5 DDRCLK#4 DDRCLK4 DDRCLK#3 DDRCLK3 5 5 5 5 5 5TP74 TP72 TP79 TP81 TP80 TP82R162TP691KDDR_2.5DDR_2.5RMD[0..63] RDQS[0..7] RDQM[0..7]RCS#[0..3] RMA[0..14] RSRAS# RSCAS# RSWE# CKE[0..3]SB_SM_CLK SB_SM_DATA3 232 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 44 45 49 51 134 135 142 144 154 65 63 MVREF DDR_2.5 1RMD0 RMD1 RMD2 RMD3 RMD4 RMD5 RMD6 RMD7 RMD8 RMD9 RMD10 RMD11 RMD12 RMD13 RMD14 RMD15 RMD16 RMD17 RMD18 RMD19 RMD20 RMD21 RMD22 RMD23 RMD24 RMD25 RMD26 RMD27 RMD28 RMD29 RMD30 RMD31 RMD32 RMD33 RMD34 RMD35 RMD36 RMD37 RMD38 RMD39 RMD40 RMD41 RMD42 RMD43 RMD44 RMD45 RMD46 RMD47 RMD48 RMD49 RMD50 RMD51 RMD52 RMD53 RMD54 RMD55 RMD56 RMD57 RMD58 RMD59 RMD60 RMD61 RMD62 RMD63 TP91TP86TP92TP85 Z Z Z Z RSRAS# RSCAS# RSWE# TP89TP84TP90TP832TP70TitleTP67TP68Size Document Number 2410 Monday, December 08, 2003 Sheet1TP96TP56TP97TP65TP98TP95TP66Date:DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 137 CK0 DQ10 138 /CK0 DQ11 16 CK1 DQ12 17 /CK1 DQ13 76 CK2 DQ14 75 /CK2 DQ15 189 CK0_L(CK3) DQ16 190 /CK0_L(CK3#) DQ17 185 CK1_L(CK4) DQ18 186 /CK1_L(CK4#) DQ19 195 CK2_L(CK5) DQ20 194 /CK2_L(CK5#) DQ21 DQ22 181 SA0 DQ23 182 SA1 DQ24 183 SA2 DQ25 196 SA0_L DQ26 Z SA1_L DQ27 198 SA2_L DQ28 DQ29 Z NC DQ30 DQ31 7 DQ32 VDD 38 VDD DQ33 46 VDD DQ34 70 VDD DQ35 85 VDD DQ36 108 VDD DQ37 120 VDD DQ38 148 VDD DQ39 168 VDD DQ40 DQ41 15 VDDQ DQ42 22 VDDQ DQ43 30 VDDQ DQ44 54 VDDQ DQ45 62 VDDQ DQ46 77 VDDQ DQ47 96 VDDQ DQ48 104 VDDQ DQ49 112 VDDQ DQ50 128 VDDQ DQ51 136 VDDQ DQ52 143 VDDQ DQ53 156 VDDQ DQ54 164 VDDQ DQ55 172 VDDQ DQ56 180 VDDQ DQ57 DQ58 3 DQ59 VSS 11 VSS DQ60 18 VSS DQ61 26 VSS DQ62 34 VSS DQ63 42 VSS 50 VSS CB0 58 VSS CB1 66 VSS CB2 74 VSS CB3 81 VSS CB4 89 VSS CB5 93 VSS CB6 100 VSS CB7 116 VSS 124 VSS /RAS 132 VSS /CAS 139 VSS /WE 145 VSS 152 VSS VREF 160 VSS 176 VSS VddSPD VddID Z NC, FETEN NC Z0923 71 NC/CS2 NC Z NC/CS3 NC NC SB_SM_CLK 92 SCL NC SB_SM_DATA 91 SDA NC DDR_DIMM184 82 102 101 90 10 9 173 CON15Z Z Z Z0917R839Modify 21300_1755SA19 of 38 Rev1DDR_2.575_175_1R484R483Unwill International Corp.DDR SLOT X 2AA BC482 0.1uMVREF_DIM MVREFCD543219 9 9RSRAS# RSCAS# RSWE#RSRAS# RSCAS# RSWE#DDR PULL HIGH7 VTT_1.25V 7 7MD[0..63] DQS[0..7] DQM[0..7]MD[0..63] DQS[0..7] DQM[0..7]9 D9 9 9RMA[0..14] RCS#[0..3] RDQM[0..7] RDQS[0..7]RMA[0..14] RCS#[0..3] RDQM[0..7] RDQS[0..7]RMA6 RMA4 RMA3 RMA2 RMD30 RMD26 RMD31 RMD27 RMA9 RMA8 RMA7 RMA5RP38 8P4RX33R 8 1 7 2 6 3 5 4 RP40 8 7 6 5 8P4RX33R 1 2 3 4RP21 1 2 3 4 RP49 1 2 3 4 RP43 1 2 3 4 RP34 1 2 3 4 RP32 1 2 3 48P4RX33R 8 RMD45 7 RMD41 6 RDQM5 5 RDQS5 8P4RX33R 8 RMA13 7 RMA14 6 RMD28 5 RMD24 8P4RX33R 8 RMD29 7 RMD25 6 RDQM3 5 RDQS3 8P4RX33R 8 RMD36 7 RMD32 6 RMD37 5 RMD33 8P4RX33R 8 RMD34 7 RDQS4 6 RMD38 5 RDQM4RP8 1 2 3 4 RP56 1 2 3 4 RP16 1 2 3 4 RP52 1 2 3 4 RP23 1 2 3 4 RP37 1 2 3 48P4RX33R 8 RMD57 7 RMD61 6 RMD62 5 RDQM7 8P4RX33R 8 RMD15 7 RMD14 6 RMD11 5 RMD10 8P4RX33R 8 RMD49 7 RMD48 6 RMD53 5 RMD52 8P4RX33R 8 RMD16 7 RMD20 6 RDQS2 5 RMD17 8P4RX47R 8 RCS#0 7 RCS#1 6 RCS#2 5 RCS#3 8P4RX33R 8 RMA1 7 RMA0 6 RMA10 5 RMA12DQS4 MD34 DQM4 MD38 MD39 MD35 MD40 MD44 MD56 MD57 DQM7 MD62 MD48 MD49 MD52 MD53 DQS6 DQM6 MD50 MD54 MD26 MD30 MD27 MD31 DQS0 DQM0 MD6 MD2RP31 8P4RX10R 8 1 RDQS4 7 2 RMD34 6 3 RDQM4 5 4 RMD38 RP30 8P4RX10R 8 1 RMD39 7 2 RMD35 6 3 RMD40 5 4 RMD44 RP9 8 7 6 5 8P4RX10R 1 RMD56 2 RMD57 3 RDQM7 4 RMD62MD55 MD51 MD60 MD61 MD32 MD36 MD33 MD37 MD45 MD41 DQS5 DQM5 MD42 MD43 MD46 MD47 DQS7 MD63 MD58 MD59 MD21 DQM2 MD18 MD22 MD0 MD4 MD5 MD1RP10 8P4RX10R 8 1 RMD55 7 2 RMD51 6 3 RMD60 5 4 RMD61 RP33 8P4RX10R 8 1 RMD32 7 2 RMD36 6 3 RMD33 5 4 RMD37 RP22 8P4RX10R 8 1 RMD45 7 2 RMD41 6 3 RDQS5 5 4 RDQM5 RP17 8P4RX10R 8 1 RMD42 7 2 RMD43 6 3 RMD46 5 4 RMD47 RP7 8 7 6 5 8P4RX10R 1 RDQS7 2 RMD63 3 RMD58 4 RMD59MD25 MD29 DQS3 DQM3 MD16 MD20 MD17 DQS2 MD10 MD14 MD15 MD11 MD19 MD23 MD24 MD28 MD7 MD3 MD8 MD9 MD12 DQS1 MD13 DQM1RP44 8 7 6 5 RP53 8 7 6 5 RP55 8 7 6 5 RP46 8 7 6 5 RP59 8 7 6 5 RP57 8 7 6 58P4RX10R 1 RMD25 2 RMD29 3 RDQS3 4 RDQM3 8P4RX10R 1 RMD16 2 RMD20 3 RMD17 4 RDQS2 8P4RX10R 1 RMD10 2 RMD14 3 RMD15 4 RMD11 8P4RX10R 1 RMD19 2 RMD23 3 RMD24 4 RMD28 8P4RX10R 1 RMD7 2 RMD3 3 RMD8 4 RMD9 8P4RX10R 1 RMD12 2 RDQS1 3 RMD13 4 RDQM1D9 7,9RMD[0..63] CKE[0..3]RMD[0..63] CKE[0..3]RP47 8P4RX33R 8 1 7 2 6 3 5 4 RP45 8 7 6 5 8P4RX33R 1 2 3 4RMD23 RMD19RP14 8P4RX10R 8 1 RMD48 7 2 RMD49 6 3 RMD52 5 4 RMD53 RP12 8 7 6 5 RP42 8 7 6 5 RP61 8 7 6 5 8P4RX10R 1 RDQS6 2 RDQM6 3 RMD50 4 RMD54 8P4RX10R 1 RMD26 2 RMD30 3 RMD27 4 RMD31 8P4RX10R 1 RDQS0 2 RDQM0 3 RMD6 4 RMD2CRMA11 RSRAS# RSWE# RSCAS#RP25 8P4RX33R 8 1 7 2 6 3 5 4CRMD4 RMD0 RMD1 RMD5 RDQM0 RDQS0 RMD6 RMD2 RMD3 RMD7 RMD9 RMD8B8 7 6 5RP63 8P4RX33R 1 2 3 4 8P4RX33R 1 2 3 4 8P4RX33R 1 2 3 4RP29 1 2 3 4 RP18 1 2 3 4 RP11 1 2 3 4 RP13 1 2 3 4 RP6 1 2 3 48P4RX33R 8 RMD35 7 RMD39 6 RMD44 5 RMD40 8P4RX33R 8 RMD43 7 RMD42 6 RMD47 5 RMD46 8P4RX33R 8 RMD51 7 RMD55 6 RMD56 5 RMD60 8P4RX33R 8 RMD54 7 RDQM6 6 RMD50 5 RDQS6 8P4RX33R 8 RMD58 7 RDQS7 6 RMD59 5 RMD63RP48 8P4RX10R 8 1 RMD21 7 2 RDQM2 6 3 RMD18 5 4 RMD22 RP64 8P4RX10R 8 1 RMD0 7 2 RMD4 6 3 RMD5 5 4 RMD1RP62 8 7 6 5 RP60 8 7 6 5DDR_2.5 C439 RP54 4 3 2 1 8P4RX56R_OP 5 CKE0 6 CKE1 7 CKE2 8 CKE3 0.1u VTT_1.25V C198 0.1u C215 0.1u C265 0.1u C175 0.1u C362 0.1u C335 0.1u C286 0.1u C389 0.1u C415 0.1u C452 0.1u C381 0.1u C223 0.1u C406 0.1u C398 0.1u C252 0.1uBC421 0.1uC402 0.1uC428 0.1uC275 0.1uC459 0.1uC430 0.1uC260 0.1uRDQS1 RMD12 RDQM1 RMD13 RDQM2 RMD21 RMD22 RMD18RP58 8P4RX33R 8 1 7 2 6 3 5 4 RP51 8P4RX33R 8 1 7 2 6 3 5 4Modify 21DDR_2.5 C374 4.7U_10V_ C479 C177 C446 C429 C378 C365 C257 1U_10V 4.7U_10V_V 4.7U_10V_U_10V_U_10V_U_10V_U_10V_U_10VMA11 SRAS# SWE# SCAS#RP26 8P4RX0R 8 1 RMA11 7 2 RSRAS# 6 3 RSWE# 5 4 RSCAS# RP39 8P4RX0R 8 1 RMA6 7 2 RMA4 6 3 RMA3 5 4 RMA2 CS#[0..3] MA[0..14]CS#0 CS#2 CS#1 CS#3RP24 8P4RX0R 8 1 RCS#0 7 2 RCS#2 6 3 RCS#1 5 4 RCS#3 RP50 8P4RX0R 8 1 RMA7 7 2 RMA9 6 3 RMA8 5 4 RMA5 7 7 7 SWE# SCAS# SRAS# SWE# SCAS# SRAS#MA1 MA0 MA10 MA12RP36 8P4RX0R 8 1 RMA1 7 2 RMA0 6 3 RMA10 5 4 RMA12C674 C675 C676 C677 C678 C679 C680 C681 C682 C683 4.7U_10V_U_10V_U_10V_U_10V_U_10V_U_10V_U_10V_U_10V_U_10V_U_10V_0805AMA6 MA4 MA3 MA2MA7 MA9 MA8 MA5MA13 MA14R423 R4250 0RMA13 RMA14Place to Bottom sideAUnwill International Corp.Title7 7CS#[0..3] MA[0..14]755SA1Size Date: Document Number 2410 Monday, December 08, 2003 RevDDR PULL HIGHSheet1A10 of 38543254321M9+C_A6 AAD[0..31] AAD[0..31] U24A AAD0 AAD1 AAD2 AAD3 AAD4 AAD5 AAD6 AAD7 AAD8 AAD9 AAD10 AAD11 AAD12 AAD13 AAD14 AAD15 AAD16 AAD17 AAD18 AAD19 AAD20 AAD21 AAD22 AAD23 AAD24 AAD25 AAD26 AAD27 AAD28 AAD29 AAD30 AAD31 AC/BE#0 AC/BE#1 AC/BE#2 AC/BE#3CMCLK SPREAD SPECTRUMDPCI / AGP6AC/BE#[0..3]AC/BE#[0..3]H29 H28 J29 J28 K29 K28 L29 L28 N28 P29 P28 R29 R28 T29 T28 U29 N25 R26 P25 R27 R25 T25 T26 U25 V27 W26 W25 Y26 Y25 AA26 AA25 AA27 N29 U28 P26 U26 AG30 AG28 AF28 AD26 M25 N26 V29 V28 W29 W28 AE26AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE#0 C/BE#1 C/BE#2 C/BE#3 PCICLK RST# REQ# GNT# PAR STOP# DEVSEL# TRDY# IRDY# FRAME# INTA# WBF#Part 1 of 7DVO / EXT TMDS / GPIOGPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 DVOMODEAJ5 AH5 AJ4 AK4 AH4 AF4 AJ3 AK3 AH3 AJ2 AH2 AH1 AG3 AG1 AG2 AF3 AF2 AE10M9+C_GPIO0 M9+C_GPIO1 M9+C_GPIO2 M9+C_GPIO3 M9+C_GPIO4 M9+C_GPIO5 M9+C_GPIO6 M9+C_GPIO7 M9+C_GPIO8 M9+C_GPIO9 M9+C_GPIO10 M9+C_GPIO11 M9+C_GPIO12 M9+C_GPIO13 M9+C_GPIO14 Z1120 MCLK_SSXTALIN XTALOUTR260 R2480_OP 0_OP U31 ZZ75_1Z1180R256 R2630XTALIN150_1TP8 TP10 TP54 TP7 TP9 TP51 TP53 TP6 TP52 TP552 3 12X1_CLKIN VDDO1 X2 REFOUT/VDDO0 PD# CLKOUT/FSIN015 14 8 16 6 5 1 7 4 12milZ1165R302 R29522 8.2KMCLK_SS +3V B56 QT R268 10DR252 1M Y1 1 2 SS_I2C_CLK SS_I2C_DAT R298 R303 4.7K 4.7K R296 8.2K_OP Z11639 13 11 10SS_ENA/FSIN1 VDDREF VDD REF_STOP VDDA SCLK SDATA GND GND GNDAZVDD_CORE1.827Mhz_30PPM_DIP C258 C253 22P 22P +3V MEM_ID0 MEM_ID1C278 + 0.1uC271 C300 C281 + 0.1u 4.7U_10V_U_10V_0805ICS91719 27MHz IN---27MHz OUTHYNIX SAMSUNG INFINEON RESERVE5AGPCLK1FOR 766SA0 milAGPCLK1 RESET#+3V6 6 6 6 6 6 6 6 AGPADSTB#1 AGPADSTB1 AGPADSTB#0 AGPADSTB08 7 6 5 INTA#Z Z Z11731 11RP20 1 2 3 48P4RX10R 8 Z75 6 Z7418,20ZV_LCDCNTL0 ZV_LCDCNTL1 ZV_LCDCNTL2 ZV_LCDCNTL3 (NC)VREFG TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P TXCLK_LN TXCLK_LP TXOUT_U0N TXOUT_U0P TXOUT_U1N TXOUT_U1P TXOUT_U2N TXOUT_U2P TXOUT_U3N TXOUT_U3P TXCLK_UN TXCLK_UP DIGON BLON TX0M TX0P TX1M TX1P TX2M TX2P TXCM TXCP DDC2CLK DDC2DATA HPD1 R G BAJ10 Z1144 AK10 Z1145 AJ11 Z1146 AH11Z1147 AG4 AK16 AH16 AH17 AJ16 AH18 AJ17 AK19 AH19 AK18 AJ18 AG16 AF16 AG17 AF17 AF18 AE18 AH20 AG20 AF19 AG19 AE12 AG12 AJ13 AH14 AJ14 AH15 AJ15 AK15 AH13 AK13 AE13 AE14 AF12 AK27 AJ27 AJ26 AG25 AH25 AH26Z AF25 AF24 AF26 AF11 AE11 Z Z Z Z Z Z1158 DFPTX0DFPTX0+ DFPTX1DFPTX1+ DFPTX2DFPTX2+ DFPTX3DFPTX3+ DFPTXC0DFPTXC0+ DFPTX4DFPTX4+ DFPTX5DFPTX5+ DFPTX6DFPTX6+ DFPTX7DFPTX7+ DFPTXC1DFPTXC1+ ENBLT#TP20 TP24 TP26 TP22Z1101 AC26 6 AGPRBF# AE29 Z75 V25 Z1176 AB29 SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 ST[2..0] ST0 ST1 ST2 AD28 AD29 AC28 AC29 AA28 AA29 Y28 Y29 AF29 AD27 AE28AGP2XRBF# AD_STBF_0 AD_STBF_1 SB_STBF SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 ST0 ST1 ST2 SB_STBS ADSTBS_0 ADSTBS_16 6 6 6 6 AGPWBF# AFRAME# SB_STB SB_STB# RP19 1 2 3 4 8P4RX10R 8 Z73 6 Z77 6BSBA[0..7]ST[0..2]Z1177 AB28 Z79 V26 AGPVREFCG AGP_VDDQ AGP_VDDQ 6 6 DBI_LO DBI_HI R219 R209 R216 R214 R272 0_OP 0_OP 0 0 R204 +3V 16 R207 4.7K_OP 16 TVC TVY TP35 TP34 137 Z1107PLACE C47 CLOSE TO ASIC PINLY0LY0+ LY1LY1+ LY2LY2+ LY3LY3+ LCLKLCLK+ UY0UY0+ UY1UY1+ UY2UY2+ UY3UY3+ UCLKUCLK+17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17 17+3V +3V R151 470 ENBTL1 ENBLT# Q12 2N7002 17 SUS_STAT# R203 20K_1 AGPADSTB#0 AGPADSTB#1 R276 R250 4.7K 4.7K SB_STB# R253 4.7KLVDS+3VAGP 4X 8XM9+C_GPIO0M26 M27 AB26 AB25 AC25AGPREF AGPTESTFPVDDEN 17 M9+C_GPIO1R165 R170 R153 R152 R144 R145 R143 R14210K_OP 10K 10K_OP 10K 10K_OP 10K 10K_OP 10KAGP 1x clock feedback phase adjustment wrt refclk (cpuclk)Z Z1110DBI_LO DBI_HI AGP8X_DET# R2SET C_R Y_G COMP_BTMDSZ1111 AK21 715 AJ23 AJ22 AK22 Z1112 AJ24 Z1113 AK24 AG23 AG24TP27 TP31 TP30 TP63 TP32 TP33 TP29 TP28 TP62 TP64 R184 ROUT GOUT BOUT HSYNC VSYNC 499_1 DDC1DATA 16 DDC1CLK 16 100K 16 16 16 16 16M9+C_GPIO2 M9+C_GPIO3Clock phase adjustment between x1clk and x2clkR2060H2SYNC V2SYNC DDC3CLK DDC3DATA SSINDAC2TMDS_PCLK XTALINAAJ25 AH28 AJ29CLK SSR205 1K_OPTMDS_SPREADAK25Modify 25M9+C_GPIO4 M9+C_GPIO5 MEM_ID0 MEM_ID1 MEM_ID0 MEM_ID1 R826 R827 R828 R829 10K_OP 10K_OP 10K 10K +3V R146 R149 10K 10KDAC1SSOUT XTALIN XTALOUT TESTEN TEST_YCLK(NC) TEST_MCLK(NC) PLLTEST(NC)HSYNC VSYNC RSET DDC1DATA DDC1CLK AUXWINControls bus type, CLK PLL select, and IDSEL.AXTALOUT R222 1K+3V 19 18R258 SUS_STAT# STOP_AGP# AGP_BUSY#20K_1 R257Z1116 AH27 E8 B6 AE25 AG26 AH30 0 Z1102 AH29 AG29THERMPWR MANSUS_STAT# STP_AGP# AGP_BUSY# RSTB_MSK(NC)DPLUS DMINUSMEM_ID SelectTitleM9+C Date:3 25407,18,21,22,26,27,29,31 PCIRST# 6 AREQ# 6 AGNT# 6 AGPPAR 1 ASTOP# RP27 2 ADEVSEL# 8P4RX10R 3 ATRDY# 4 AIRDY#SS_I2C_DAT SS_I2C_CLK100 0ZV_LCDDATA0 ZV_LCDDATA1 ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5 ZV_LCDDATA6 ZV_LCDDATA7 ZV_LCDDATA8 ZV_LCDDATA9 ZV_LCDDATA10 ZV_LCDDATA11 ZV_LCDDATA12 ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15 ZV_LCDDATA16 ZV_LCDDATA17 ZV_LCDDATA18 ZV_LCDDATA19 ZV_LCDDATA20 ZV_LCDDATA21 ZV_LCDDATA22 ZV_LCDDATA230 Z AH6 0 Z AJ6 Z1124 AK6 TP11 Z1125 AH7 TP13 Z1126 AK7 TP12 Z1127 AJ7 TP14 Z1128 AH8 TP18 Z1129 AJ8 TP15 Z1130 AH9 TP21 Z1131 AJ9 TP23 Z1132 AK9 TP19 AH10 Z R172 TP250 AE6 Z AG6 Z1136 AF6 TP57 Z1137 AE7 TP58 10K Z AF7 10K AE8 Z R185 33 AG8 Z AF8 ZK AE9 Z1142 AF9 Z1143 TP59 Z1105 AG10 TP61 AF10 Z1106 TP60AGP_VDDQMEMORYMEM_ID0 MEM_ID1MEN_ID0MEN_ID1 350mvR267 324_1 AGPVREFCG C259 R262 0.1u 100_1CBModify 22AGP_VDDQC684220P+3VM9+C_GPIO4 M9+C_GPIO5R147 R14810K_OP 10K_OP+3VUnwill International Corp.755SA1Size Document Number 2410 Monday, December 08, 2003 RevMOBILITY M9+C_ASheet1Aof 381154321M9+C_BDM9+C_CD14 14DQSB[7..0] MDB[63..0]DQSB[7..0] MDB[63..0] MEM_MAB[13..0] DQMB#[7..0]14 MEM_MAB[13..0] 14 DQMB#[7..0]U24B L25 L26 K25 K26 J26 H25 H26 G26 G30 D29 D28 E28 E29 G29 G28 F28 G25 F26 E26 F25 E24 F23 E23 D22 B29 C29 C25 C27 B28 B25 C26 B26 F17 E17 D16 F16 E15 F14 E14 F13 C17 B18 B17 B15 C13 B14 C14 C16 A13 A12 C12 B12 C10 C9 B9 B10 E13 E12 E10 F12 F11 E9 F9 F8 DQA0 DQA1 DQA2 DQA3 DQA4 DQA5 DQA6 DQA7 DQA8 DQA9 DQA10 DQA11 DQA12 DQA13 DQA14 DQA15 DQA16 DQA17 DQA18 DQA19 DQA20 DQA21 DQA22 DQA23 DQA24 DQA25 DQA26 DQA27 DQA28 DQA29 DQA30 DQA31 DQA32 DQA33 DQA34 DQA35 DQA36 DQA37 DQA38 DQA39 DQA40 DQA41 DQA42 DQA43 DQA44 DQA45 DQA46 DQA47 DQA48 DQA49 DQA50 DQA51 DQA52 DQA53 DQA54 DQA55 DQA56 DQA57 DQA58 DQA59 DQA60 DQA61 DQA62 DQA63 M9+C Part 2 of 7 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 (MAA13)MAA12 (MAA12)MAA13 (NC)MAA14 DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7 QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7 RASA# CASA# WEA# CSA0# CSA1# CKEA CLKA0 CLKA0# CLKA1 CLKA1# E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19 J25 F29 E25 A27 F15 C15 C11 E11 J27 F30 F24 B27 E16 B16 B11 F10 A19 E18 E19 E20 F20 B19 B21 C20 C18 A18 R155 MVREFD MVREFS DIMA_0 DIMA_1 B7 B8 D30 B13 Z1201 VREF = .50*VDDQ ZK C157 0.1u 1K VDD_MEM_IO MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 D7 F7 E7 G6 G5 F5 E5 C4 B5 C5 A4 B4 C2 D3 D1 D2 G4 H6 H5 J6 K5 K4 L6 L5 G2 F3 H2 E2 F2 J3 F1 H3 U6 U5 U3 V6 W5 W4 Y6 Y5 U2 V2 V1 V3 W3 Y2 Y3 AA2 AA6 AA5 AB6 AB5 AD6 AD5 AE5 AE4 AB2 AB3 AC2 AC3 AD3 AE1 AE2 AE3U24C DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQB9 DQB10 DQB11 DQB12 DQB13 DQB14 DQB15 DQB16 DQB17 DQB18 DQB19 DQB20 DQB21 DQB22 DQB23 DQB24 DQB25 DQB26 DQB27 DQB28 DQB29 DQB30 DQB31 DQB32 DQB33 DQB34 DQB35 DQB36 DQB37 DQB38 DQB39 DQB40 DQB41 DQB42 DQB43 DQB44 DQB45 DQB46 DQB47 DQB48 DQB49 DQB50 DQB51 DQB52 DQB53 DQB54 DQB55 DQB56 DQB57 DQB58 DQB59 DQB60 DQB61 DQB62 DQB63 M9+C Part 3 of 7 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 (MAB13)MAB12 (MAB12)MAB13 (NC)MAB14 DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7 RASB# CASB# WEB# CSB0# CSB1# CKEB CLKB0 CLKB0# CLKB1 CLKB1# DIMB_0 DIMB_1 ROMCS# MEMVMODE_0 MEMVMODE_1 MEMTEST N5 M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2 E6 B2 J5 G3 W6 W2 AC6 AD2 F6 B3 K6 G1 V5 W1 AC5 AD1 R2 T5 T6 R5 R6 R3 N1 N2 T2 T3 E3 AA3 AF5 C6 C7 C8 Z Z.7K R156 4.7K_OP R157 R177 4.7K 4.7K_OP VDD_CORE1.8 Z Z R141 R140 R136 R137 10 10 10 10 MEM_CKEB MEM_CLKB0 MEM_CLKB0# MEM_CLKB1 MEM_CLKB1#BMEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8CMEM_MAB0 MEM_MAB7 MEM_MAB6 MEM_MAB4 MEM_MAB8 MEM_MAB1 MEM_MAB5 MEM_MAB2 MEM_MAB3 MEM_MAB9 MEM_MAB10 MEM_MAB11 MEM_MAB12 MEM_MAB13MEM_MAB0 14 MEM_MAB7 14 MEM_MAB6 14 MEM_MAB4 14 MEM_MAB8 14 MEM_MAB1 14 MEM_MAB5 14 MEM_MAB2 14 MEM_MAB3 14 MEM_MAB9 14 MEM_MAB10 14 MEM_MAB11 14 MEM_MAB12 14 MEM_MAB13 14CMEMORY INTERFACE BDQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7 DQSB0 DQSB1 DQSB2 DQSB3 DQSB4 DQSB5 DQSB6 DQSB7Modify 17MEMORY INTERFACE AModify 17MEM_RASB# MEM_WEB# MEM_CASB# MEM_CSB0# MEM_CSB1# MEM_RASB# 14 MEM_WEB# 14 MEM_CASB# 14 MEM_CSB0# 14 MEM_CSB1# 14BMEM_CKEB 14 MEM_CLKB0 14 MEM_CLKB0# 14 MEM_CLKB1 14 MEM_CLKB1# 14VDD_MEM_IOR175 47R187 1KFOR 2.5V VDDR1 MEMVMODE0 = 1.8V MEMVMODE1 = GND FOR 1.8V VDDR1(ELPIDA) MEMVMODE0 = GND MEMVMODE1 = 1.8VAAR188 1KC186 0.1uUnwill International Corp.Title755SA1Size Date:5 4 3 2Document Number 2410 Monday, December 08, 2003RevMOBILITY M9+C_B/CSheet1Aof 381254321VDDR1(R4) IS CLKBFB ON M9+X AND IS A NCVDD_CORE P17 P18 P19 U12 U13 U14 U17 U18 U19 V19 V18 V17 V14 V13 V12 N18 N17 N14 W17 W18 W12 W13 W14 N13 N19 M19 M18 M12 N12 M13 M14 P12 P13 P14 M17U24F VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC Part 6 of 7 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS M16 N16 N15 P15 P16 R18 R17 R16 R15 R14 R13 R12 T13 T14 T15 W15 V16 V15 U15 U16 T19 T18 T17 T16DU24D VDD_MEM_IO T7 R4 R1 N8 N7 M4 L27 L8 J24 J23 J8 J7 J4 J1 H10 H13 H15 H17 T8 V4 V7 V8 AA1 AA4 AA7 AA8 A3 A9 A15 A21 A28 B1 B30 D26 D23 D20 D17 D14 D11 D8 D5 E27 F4 G7 G10 G13 G15 G19 G22 G27 H22 H19 AD4 T4 N4 D19 D13 VDDR1 Part 4 of 7 VDDR1(CLKBFB) VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDC VDDR1 VDDR1 (VDDC18)VDD15 VDDR1 (VDDC18)VDD15 VDDR1 (VDDC18)VDD15 VDDR1 (VDDC18)VDD15 VDDR1 (VDDC18)VDD15 VDDR1 (VDDC18)VDD15 VDDR1 (VDDC18)VDD15 VDDR1 (VDDC18)VDD15 VDDR1 VDDR1 VDDR3 VDDR1 VDDR3 VDDR1 VDDR3 VDDR1 VDDR3 VDDR1 VDDR3 VDDR1 VDDR3 VDDR1 VDDR3 VDDR1 VDDR3 VDDR1 VDDR1 VDDR4 VDDR1 VDDR4 VDDR1 VDDR4 VDDR1 VDDR4 VDDR1 VDDR4 VDDR1 VDDR1 VDDP VDDR1 VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1 VDDP VDDR1(CLKAFB) VDDP VDDR1 VDDP VDDP VDDP AVSSQ AE17 AE20 AE15 AF21 AJ20 AK12 AF13 AF14 LVDDR_25(LVDDR18_25) LVDDR_25(LVDDR18_25) LVDDR_18 LVDDR_18 LPVDD TPVDD LVSSR LVSSR LVSSR LVSSR LPVSS TPVSSDVDD_COREM10-P CENTER ARRAYAC13 AD13 AD15 AC15 AC17 P8 Y8 AC11 AC20 Y23 L23 H20 H11 AD7 AD19 AD21 AD22 AC22 AC21 AC19 AC8 AG7 AD9 AC9 AC10 AD10 J30 AF27 AE30 AC27 AC23 AB30 AA24 AA23 Y27 W30 V23 V24 M23 M24 N30 P23 P27 T23 T24 T30 U27 AD24 AF20 AE19 AE16 AF15 AJ19 AJ12 AH12 AG13 AG14 F19 M6 AH22 AJ21 AF23 AH23 AE23 AE21 AJ28 A6 Z1302M9+X IS VDDC18 AND CONNECTS TO 1.8V M10-P IS VDDC15 AND CONNECTS TO 1.5VR259 0 VDD_CORE1.8VDD_CORE VDDC1 VDDC1 VDDC1 VDDC1 VDDC1 W19 W16 M15 R19 T12 M9+CC+3VCAGP_VDDQU24E A2 A10 A16 A22 A29 C1 C3 C28 C30 D27 D24 D21 D18 D15 D12 D9 D6 D4 F27 G9 G12 G16 G18 G21 G24 H27 H23 H21 H18 H16 H14 H12 H9 H8 H4 K30 K27 K24 K23 AG15 AD12 AE27 AG5 AG9 AG11 AG18 AG22 AG27 E4 AB4 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS M9+C Part 5 of 7 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS K8 K7 K1 L4 M30 M8 M7 N23 N24 N27 P4 R7 R8 R23 R24 R30 T27 T1 U4 U8 U23 V30 W7 W8 W23 W24 W27 Y4 AA30 AB27 AB24 AB23 AB8 AB7 AB1 AC4 AC12 AC14 AD16 AC16 AC18 AD30 AD25 AD18 AK2 AK29 AJ30 AJ1 D10 D25VDDR1(D19) IS CLKAFB ON M9+X AND IS A NCCORE GNDBBVDD_CORE1.8 VDD_PNLPLL1.8VDD_MCLK2.5 VDD_DAC2.5 A2VDDQ_1.8 AVDD_1.8 VDDDI_1.8F18 N6 AG21 AH21 AF22 AH24 AE24 AE22 AK28 A7VDDRH0 VDDRH1 A2VDD A2VDD A2VDDQ AVDD VDD1DI VDD2DI PVDD MPVDDI/O POWERTXVDDR TXVDDRTXVSSR TXVSSR TXVSSR VSSRH0 VSSRH1 A2VSSN A2VSSN A2VSSQ AVSSN VSS1DI VSS2DIVDD_PLL1.8APVSS MPVSS M9+CAVDD_MEMPLL1.8M9+X IS LVDDR_18_25 AND CONNECTS TO 1.8V M10-P IS LVDDR_25 AND CONNECTS TO 2.5VUnwill International Corp.Title755SA1Size Date:5 4 3 2Document Number 2410 Monday, December 08, 2003RevMOBILITY M9+C_D/ESheet1Aof 381354321U63 MEM_MAB13 MEM_MAB12 MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11 26 27 29 30 31 32 35 36 37 38 39 40 28 41 24 23 22 21 MEM_CLKB1 MEM_CLKB1# 12 MEM_CKEB MEM_QSB5 MEM_QSB7 MEM_DQMB#5 MEM_DQMB#7 MEMVREFB 45 46 44 16 51 20 47 49 66 48 34 BA0 BA1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 CS RAS CAS WE CLK CLK CKE LDQS UDQS LDM UDM VREF VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC1 NC1 NC1 NC1 NC1 NC1 NC1 NC1 VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65 14 17 19 25 42 43 50 53 1 18 33 3 9 15 15 55 61 6 12 52 58 64 MEM_MDB40 MEM_MDB41 MEM_MDB42 MEM_MDB43 MEM_MDB44 MEM_MDB45 MEM_MDB46 MEM_MDB47 MEM_MDB56 MEM_MDB57 MEM_MDB58 MEM_MDB59 MEM_MDB60 MEM_MDB61 MEM_MDB62 MEM_MDB63 MEM_MAB13 MEM_MAB12 MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11 MEM_CSB1# MEM_RASB# MEM_CASB# MEM_WEB# MEM_CLKB0 MEM_CLKB0# MEM_CKEB MEM_QSB1 MEM_QSB3 MEM_DQMB#1 MEM_DQMB#3 MEMVREFB 26 27 29 30 31 32 35 36 37 38 39 40 28 41 24 23 22 21 45 46 44 16 51 20 47 49 66 48 34U64 BA0 BA1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 CS RAS CAS WE CLK CLK CKE LDQS UDQS LDM UDM VREF VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC1 NC1 NC1 NC1 NC1 NC1 NC1 NC1 VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65 14 17 19 25 42 43 50 53 1 18 33 3 9 15 15 55 61 6 12 52 58 64 MEM_MDB8 MEM_MDB10 MEM_MDB9 MEM_MDB11 MEM_MDB12 MEM_MDB14 MEM_MDB15 MEM_MDB13 MEM_MDB27 MEM_MDB25 MEM_MDB28 MEM_MDB30 MEM_MDB24 MEM_MDB31 MEM_MDB26 MEM_MDB29 12 MEM_CSB0# MEM_MAB13 MEM_MAB12 MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11 MEM_CSB0# MEM_RASB# MEM_CASB# MEM_WEB# MEM_CLKB1 MEM_CLKB1# MEM_CKEB 26 27 29 30 31 32 35 36 37 38 39 40 28 41 24 23 22 21 45 46 44 16 51 20 47 49 66 48 34U65 BA0 BA1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 CS RAS CAS WE CLK CLK CKE LDQS UDQS LDM UDM VREF VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC1 NC1 NC1 NC1 NC1 NC1 NC1 NC1 VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65 14 17 19 25 42 43 50 53 1 18 33 3 9 15 15 55 61 6 12 52 58 64 MEM_MDB55 MEM_MDB54 MEM_MDB53 MEM_MDB52 MEM_MDB51 MEM_MDB50 MEM_MDB49 MEM_MDB48 MEM_MDB39 MEM_MDB38 MEM_MDB37 MEM_MDB36 MEM_MDB34 MEM_MDB35 MEM_MDB33 MEM_MDB32 MEM_MAB13 MEM_MAB12 MEM_MAB0 MEM_MAB1 MEM_MAB2 MEM_MAB3 MEM_MAB4 MEM_MAB5 MEM_MAB6 MEM_MAB7 MEM_MAB8 MEM_MAB9 MEM_MAB10 MEM_MAB11 MEM_CSB0# MEM_RASB# MEM_CASB# MEM_WEB# MEM_CLKB0 MEM_CLKB0# MEM_CKEB MEM_QSB2 MEM_QSB0 MEM_DQMB#2 MEM_DQMB#0 MEMVREFB 26 27 29 30 31 32 35 36 37 38 39 40 28 41 24 23 22 21 45 46 44 16 51 20 47 49 66 48 34U66 BA0 BA1 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 CS RAS CAS WE CLK CLK CKE LDQS UDQS LDM UDM VREF VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 NC1 NC1 NC1 NC1 NC1 NC1 NC1 NC1 VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 2 4 5 7 8 10 11 13 54 56 57 59 60 62 63 65 14 17 19 25 42 43 50 53 1 18 33 3 9 15 15 55 61 6 12 52 58 64 MEM_MDB22 MEM_MDB23 MEM_MDB21 MEM_MDB20 MEM_MDB19 MEM_MDB18 MEM_MDB17 MEM_MDB16 MEM_MDB4 MEM_MDB5 MEM_MDB3 MEM_MDB6 MEM_MDB7 MEM_MDB1 MEM_MDB2 MEM_MDB0DD12 12 12 12MEM_CSB1# MEM_RASB# MEM_CASB# MEM_WEB#VDD_MEM_IOVDD_MEM_IOVDD_MEM_IOVDD_MEM_IOVDD_MEM_IOMEM_QSB6 MEM_QSB4 MEM_DQMB#6 MEM_DQMB#4 MEMVREFBR819 1K_1C30mil R820 1K_1 C627 0.1uFCPLACE CLOSE TO MEMORYPLACE CLOSE TO U63VDD_MEM_IO VDD_MEM_IOPLACE CLOSE TO U64VDD_MEM_IOPLACE CLOSE TO U65VDD_MEM_IOPLACE CLOSE TO U66BC628 0.1uFC629 0.1uFC630 0.1uFC631 0.1uFC632 0.1uF_OPC633 0.1uFC634 0.1uFC635 0.1uFC636 0.1uFC637 0.1uF_OPC638 0.1uFC639 0.1uFC640 0.1uFC641 0.1uFC642 0.1uF_OPC643 0.1uFC644 0.1uFC645 0.1uFC646 0.1uFC647 0.1uF_OPBPLACE CLOSE TO MEMORY12 MEM_CLKB0 R821 56.2_1 Z1401AMEM_CLKB012MEM_CLKB1 R822 56.2_1MEM_CLKB1MEM_QSB[7..0]DQSB[7..0] 12MEM_MDB[63..0] C649 ZPF MEM_MAB[13..0]C648MDB[63..0] 12470PF R823 56.2_1 12 MEM_CLKB0# MEM_CLKB0# 12 MEM_CLKB1# R824 56.2_1AMEM_MAB[13..0] 12MEM_CLKB1# MEM_DQMB#[7..0] DQMB#[7..0] 12Unwill International Corp.Title755SA1Size Date:5 4 3 2Document Number 2410 Monday, December 08, 2003RevVRAMSheet1A14 of 3854321B45 VDD_CORE1.8 QTHC_3A_0805_OP +2.5V B46 QTHC_3A_DPlace to Bottom sideVDD_MCLK2.5( VDDRH0,1 INCLUDED IN VDDR1)+1.8VVDD_CORE1.8C209 1U_10V220PC210 0.1uC685 1U_10VDModify 24B39 VDD_CORE1.8 QTHC_3A_0805_OP +2.5V B31 QTHC_3A_0P C144 0.1u C145 1U_10V C200 0.1u C227 0.1u C147 1U_10V C148 1U_10V C686 4.7U_10V_.7U_10V_0805 VDD_MEM_IO(700 MA 1.8V/2.5V EXT MEM VDDQ,VDDR1)+1.5VPlace to Bottom sideB42 QTHC_3A_0P C262 C690 AGP_VDDQ C691 4.7U_10V_0805_OP0.1u 4.7U_10V_0805_OPModify 24+2.5V B44 QTHC_3A_0PCModify 24VDD_DAC2.5(80 MA 2.5V A2VDD)+1.5VC193 0.1uCVDD_COREVDD_CORE1.8B54 QT C251 220P C246 0.1uVDD_PLL1.8(21MA 1.8V PVDD)VDD_COREVDD_CORE1.8B41 QT C181 220P C180 0.1uVDD_PNLPLL1.8(40 MA 1.8V LPVDD,TPVDD)C182C167C187C195C196C183 0.1uC184 0.1u1U_10V 1U_10V 1U_10V 1U_10V 1U_10VBVDD_CORE1.8B38 QT C170 220P C171 0.1uBVDD_MEMPLL1.8 (5 MA 1.8V MPVDD)C197 0.1uC169 0.1uC168 0.1uPlace to Bottom sideVDD_CORE1.8 B51 QT C234 220P C233 0.1u A2VDDQ_1.8(67 MA 1.8V AVDD,A2VDDQ,VDD1DI,VDD2DI)C663 4.7U_10V_.7U_10V_.7U_10V_.7U_10V_0805Modify 24VDD_CORE1.8 B52 QT C236 220P C235 0.1u AVDD_1.8(67 MA 1.8V TOTAL FOR AVDD,A2VDDQ,VDD1DI,VDD2DI)AAVDD_CORE1.8B50 QT C217 220P C216 0.1uVDDDI_1.8(67 MA 1.8V TOTAL FOR AVDD,A2VDDQ,VDD1DI,VDD2DI)TitleUnwill International Corp.755SA1Size Date: Document Number 2410 Monday, December 08, 2003 RevMOBILITY M9+C POWERSheet1A3815of5432543213333D6 11DD11 DA204U_OP 2 1 2D1 DA204U_OP 1 2D7 DA204U_OP 1 23D12 DA204U_OPDHSYNCHSYNCR833ZDA204U_OP 1 +3V+3V VSYNC R14 33 Z1610+3V+3V+3V11 11 11 11VSYNC ROUT GOUT BOUTCN1 B8 B6 B4 B7 B5 DDC_DATA B3 B2 R17 R16 C32 DDC_CLK 3 3 75_1 10P 75_1 10P 75_1 10P 10P 10P 10P 10P 10P 10P 10P C31 R15 C28 QT QT C25 C23 C21 C24 C22 Z QT C18 QT QT QT QT Z ZU_OP Z Z 2 10 3 11 4 12 5 13 6 14 7 15 8 1716C20C19CRT CONNCCModify 29Q1 11 DDC1CLK R4 4.7K +3V R18 4.7K 2N7002 DDC_CLK 1 2 D5 DA204U_OP 1 2 C27 2N TVY R22 C37 75_1 100P_OP QT C30 100P COMP D8 DA204U_OPR5 4.7K +5V R3 +3V +3VQ24.7K DDC_DATA 22P_OP11BDDC1DATATV-OUTBconnect to VGA connC2622P_OP CN3 S_VIDEO B25 LUMA11TVC R28 C40 75_1 100P_OP QT C2934 D9 DA204U_OP 23 1 D10 DA204U_OP 5 6 7 8A100P 1 2A13 2+3V+3V TitleUnwill International Corp.755SA1Size Date: Document Number 2410 Monday, December 08, 2003 RevCRT & TV-OUTSheet1A16 of 38543254321LCD_VCCModify 29LCD_VCC LCD_VCCLCD_VCC +3VC34 0.01UF 11 11 11 11 11 11 11 11 11 11 LY0+ LY0LY2+ LY2UY0+ UY0UY2+ UY2UY3UY3+CON4 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30C38 220P +3V LY1+ LY1LY3LY3+ LCLK+ LCLKUY1+ UY1UCLK+ UCLK11 11 11 11 11 11 11 11 11 11 LCDSEL0# LCDSEL1# LCDSEL2# R44 R30 R19 10K 10K 10K 11 31 ENBTL1 LCDSW D16 D17 BAT54 BAT54 BL_ON R43 10KDDLCD_CON 88107-30C VIN_LCD Q3 +3V R53 47K Z1701 SI2301DS VCC3_LCD B27 QTHC_3A_K C54 0.01u LCD_VCC 31 BRIGHTADJ BRIGHTADJ R20 BL_ON R21 LCDSEL2# LCDSEL1# LCDSEL0# 100 100 Z INVERTER_CONN 1 2 3 4 5 6 7 8 9 10 11 12 CON22CC19 19 19LCDSEL2# LCDSEL1# LCDSEL0#Q4 11 FPVDDEN R64 47K Z2 C74 0.1U_16V_X7RVINB28 QT05 C42 0.1u C39 0.01u C35 220PVIN_LCD+3V D15 BAT54 BRIGHTADJ C69 C70 D14 BAT54 BL_ON C68 C67 LCDSEL0# LCDSEL1# LCDSEL2# C53 C41 C36 220PBB1U_10V 220P 1U_10V 220P 220P 220PAPANNEL SELECTLCD TYPE LCDSEL2 LCDSEL1 LCDSEL0A18Bit XGA 1 1 1518Bit SXGA 1 1 018Bit SXGA+ 1 0 0Reserve24Bit XGA 0 1 1424Bit SXGA 0 1 024Bit SXGA+ 0 0 0ReserveTitleUnwill International Corp.755SA1Size Date:3 2Document Number 2410 Monday, December 08, 2003RevLVDS CONNSheet1A17 of 385432122,26AD[0..31]AD[0..31] AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C/BE#3 C/BE#2 C/BE#1 C/BE#0 J5 J4 H2 H1 J3 K4 J2 J1 K5 K2 L3 K1 L1 L4 L5 L2 N5 P2 P3 P4 R2 R3 R1 T1 P5 T2 U1 U2 T3 R5 U3 V1 K3 M4 P1 R4 F1 F2 E1 H5 F3 H3 G1 G2 G3 H4 E3 F4 E2 G4 Y2 M3 N2 N3 M1 M2 N4 N1 M5U55B AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C/BE3# C/BE2# C/BE1# C/BE0# PREQ4# PREQ3# PREQ2# PREQ1# PREQ0# PGNT4# PGNT3# PGNT2# PGNT1# PGNT0# INTA# INTB# INTC# INTD# PCICLK FRAME# PLOCK# PAR IRDY# TRDY# STOP# DEVSEL# SERR# PCIRST# IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8 IDA9 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15 IDECSA1# IDECSA0# IIORA# IIOWA# IDACKA# ICHRDYA IDREQA IIRQA IDSAA2 IDSAA1 IDSAA0 CBLIDA IDB0 IDB1 IDB2 IDB3 IDB4 IDB5 IDB6 IDB7 IDB8 IDB9 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15 IDECSB1# IDECSB0# IIORB# IIOWB# IDACKB# ICHRDYB IDREQB IIRQB IDSAB2 IDSAB1 IDSAB0 CBLIDB IDEAVDD IDEAVSS U10 V9 W8 T9 Y7 V7 Y6 Y5 W6 U8 W7 V8 U9 Y8 T10 W9 T12 V12 V11 Y9 Y10 W10 V10 Y11 T11 U11 W11 U12 Y16 V15 U14 W14 V13 T13 Y13 Y12 W12 W13 U13 Y14 V14 W15 Y15 U15 U16 W18 T14 W16 V16 W17 Y17 T16 Y18 T15 V17 U17 Y3 Y4 IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8 IDA9 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15 IDECSA1# IDECSA0# IIORA# IIOWA# IDACKA# ICHRDYA IDREQA IIRQA IDSAA2 IDSAA1 IDSAA0 CBLIDA IDB0 IDB1 IDB2 IDB3 IDB4 IDB5 IDB6 IDB7 IDB8 IDB9 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15 IDECSB1# IDECSB0# IIORB# IIOWB# IDACKB# ICHRDYB IDREQB IIRQB IDSAB2 IDSAB1 IDSAB0 CBLIDB IDEAVDD IDEAVSS 20MILIDA[0..15]IDA[0..15] 721 ZAD[0..16] ZAD[0..16] U55A ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 T52 5 7 7 7 7 +1.8V 7 7 963ZCLK 133MHZ 963ZCLK ZUREQ ZDREQ ZSTB0 ZSTB#0 ZSTB1 ZSTB#1 963ZCLK ZUREQ ZDREQ ZSTB0 ZSTB#0 ZSTB1 ZSTB#1 M18 N19 M17 M16 M20 L16 L20 L18 K18 K19 K17 K16 H20 J18 H19 H18 P20 V20 N16 N17 M19 N20 J20 K20 ZAD0 ZAD1 ZAD2 ZAD3 ZAD4 ZAD5 ZAD6 ZAD7 ZAD8 ZAD9 ZAD10 ZAD11 ZAD12 ZAD13 ZAD14 ZAD15 ZAD16 ZCLK ZUREQ ZDREQ ZSTB0 ZSTB0# ZSTB1 ZSTB1# Z4XAVDD Z4XAVSS Z1XAVDD Z1XAVSS SiS963L VDDZCMP VSSZCMP ZCMP_N ZCMP_P ZVREF R19 P18 N18 R18 R20 SVDDZCMP SVSSZCMP SZCMP_N SZCMP_P SZVREF FERR# IGNNE# NMI INTR CPUSLP# STPCLK# SMI# INIT# A20M# FERR# T17 IGNNE# U18 NMI Y20 INTR R16 CPUSLP# V19 W20 STPCLK# SMI# R17 INIT# T18 A20M# P16 V18 W19 Z Y19 V5 T7 U6 W5 W4 U7 V6 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ# SIRQ R503 0 20K_1 LAD[0..3] THERMTRIP# 3 AGP_BUSY# 11 +3V LAD[0..3] 29,31 FERR# IGNNE# NMI INTR CPUSLP# STPCLK# SMI# INIT# A20M# 3 3 3 3 3 3,4 3 3 3DDHostPrimary IDEAPICD0/THERM2# APICD1/GPIOFF# APICCK/LDTREQ# LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ# SIRQ9633.3V 3.3V PCI BUSIDECSA1# 21 IDECSA0# 21 IIORA# IIOWA# IDACKA# ICHRDYA IDREQA IIRQA IDSAA2 IDSAA1 IDSAA0 CBLIDA 21 21 21 21 21 21 21 21 21 21LPCCLFRAME# 29,31 LDRQ# 29,31 SIRQ 22,29,31C20,22,26 C/BE#[0..3]C/BE#[0..3]ZSTB0 R473 ZSTB1 R471 ZSTB#0 R474 ZSTB#1 R4724.7K_OP 4.7K_OP 4.7K_OP 4.7K_OP963Z4XAVDD T20 963Z4XAVSS T19 963Z1XAVDD U20 963Z1XAVSS U1926 22PREQ#2 PREQ#0PREQ#2 PREQ#0963 MuTIOLSecondary IDECLOSE to SB20,26 20,22BPGNT#2 PGNT#0 INTA# INTB# INTC# INTD# PCICLKPGNT#2 PGNT#0 INTA# INTB# INTC# INTD# PCICLK PCIFRAME# PCILOCK# PCIPAR PCIIRDY# PCITRDY# PCISTOP# PCIDEVSEL# PCISERR# R595 33+3V IDB[0..15] IDECSB1# 21 IDECSB0# 21 IIORB# IIOWB# IDACKB# ICHRDYB IDREQB IIRQB IDSAB2 IDSAB1 IDSAB0 CBLIDB 21 21 21 21 21 21 21 21 21 21 R558 C577 0.1u C578 0.01u 0 C572 0.1u +1.8V + IDB[0..15] 21 R490 030MIL +1.8V 963Z1XAVDD R489 C500 C511 0.1u 0.01u 963Z1XAVSS C498 0.1u 0 30MILR49756SZCMP_NSVDDZCMP C508 0.01u SVSSZCMPBT4 T4433MHz PCICLK11,20 20,22 20,22,26 20,263.3V5 PCIFRAME#20,22,26 PCIFRAME# 20 PCILOCK# 20,22,26 PCIPAR 20,22,26 PCIIRDY# 20,22,26 PCITRDY# 20,22,26 PCISTOP# 20,22,26 PCIDEVSEL# 20,22,26 PCISERR# 7,11,21,22,26,27,29,31 PCIRST# PCIRST#+3V B70 QT C499 C483 4.7U_10V_V +3V LFRAME# R541 4.7K 0.1u 30MIL 963Z4XAVDD C510 0.01u 963Z4XAVSS R495 56 SZCMP_PZ1801 C31.8VSiS963L R486AC490 0.1u 20 Mil SZVREFA150_1R494 49.9_11/4 0.45V C509 0.1uUnwill International Corp.Title755SA1Size Date: Document Number 2410 Monday, December 08, 2003 RevSiS963 (PCI/IDE/MuTIOL)Sheet1A3818of543254321RTCD48 Z1916 A B77 QT BAS16 OSC25MHO OSC25MHI MDC MDIO TXD0 TXD1 TXD2 TXD3 A9 A8 C5 E7 E8 D7 C6 B4 A6 B6 D8 A5 B5 A4 C7 C8 A7 B7 E9 B8 B9 F20 D20 E20 C20 V2 T8 T4 T6 W1 U5 U4 C4 C14 E6 CB_RINGIN CARD_ACT# LCDSEL0# 17 LCDSEL1# 17 LCDSEL2# 17 CB_RINGIN 22 +3V SYS_SPK SiS963L AC_SDOUT SB_ACPILED R596 R460 4.7K_OP 4.7K_OP R597 4.7K_OP EXTSMI# MIIAVSS MIIAVDD EECK/SCL EEDI/SDA EEDO EECS PCI_CBRST# PCI_CBRST# 22 SMP_TMP 31 SMP_INT EXTSMI# 31 31 +3VS 22,26,31 SCI# SCI# R465 4.7K RXDV RXER RXCLK COL CRS Z1908 LAN_25M Z Z Z Z R550 R561 R564 R581 22 22 22 22 22 22 22 TXCLK TXEN MDC MDIO LAN_25MModify 14RTCVDDD50 BAS16 C R585A 10K BATOK C565 4.7U_10V_0805DCT37 U55C 7,31 7,31 AC_BIT_CLK PWROK AUXOK SB_ACPILED PWROK D1 BATOK D3 AUXOK A3 SB_ACPILED A15 PWRBTN# PSON# SCI# A14 D14 B14 Y1 D6 A2 D5 Z02 T5 PWROK BATOK AUXOK ACPILED PWRBTN# PSON# PME# AC_BIT_CLK AC_RESET# AC_SDIN0 AC_SDIN1 AC_SDOUT AC_SYNC SPK ENTEST 14.318MOSCI+3V_AUXC Z1907 30MIL R831 + C566 C621 0.1u470 D49 BAS16 ZK Z1918 BT1 BBBCR2032B-KTS 2 1 A 2 14.7U_10V_0805 LAN_25M 27 MDC MDIO MTXD0 MTXD1 MTXD2 MTXD3 T43 TXCLK TXEN MRXD0 MRXD1 MRXD2 MRXD3 RXDV RXER RXCLK T40 COL CRS 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 27 PM_CPU_STP# R578 R580 PCI_STP# 4.7K 4.7KJ1 OPEN_S RTCVDDDC560 10P_OPC60431 PWRBTN# 31,32 PSON# C596 22,26,31 10P SCI# AC_BIT_CLK AC_RESET# AC_SDIN0 AC_SDIN1 AC_SDOUT AC_SYNCC605 CLOSE TO SB AND 1U_10V 0.01u TRACE 30 MIL MIN23,27 AC_BIT_CLK 23,27 AC_RESET# 23 AC_SDIN0 27 AC_SDIN1 23,27 AC_SDOUT 23,27 AC_SYNC 23 5 5,9 5,9 SYS_SPK 963REF1 +3VS SB_SM_CLK SB_SM_DATAMII AC'97TXCLK TXEN RXD0 RXD1 RXD2 RXD3ZR570 10 R571 10CSYS_SPK V3 SB_ENTEST G5 14.318M 963REF1 W3 R573 10K R574 10K SB_SM_CLK A1 SB_SM_DATA B2 OSC32KHO GROUND TRACE BETWEEN OSC32KHI RTCVDD 30MIL963/MII/GPIO..RXDV RXER RXCLK COL CRSOSC32KHI +3VS R579 10MCOSC32KHO 8MILGPIO19/SM_CLK GPIO20/SM_DATAD2 C2 C1 E4MIIAVSS MIIAVDD OSC32KHO OSC32KHI RTCVDD RTCVSS GPIO15/KBDAT/VR_HILO# GPIO16/KBCLK/LO_HI# GPIO17/PMDAT/VGATEM# GPIO18/PMCLK/RTC32K_OUT+3VY532.768KHz_DIPRTCEEPROMGPIO21/EESK GPIO22/EEDI GPIO23/EEDO GPIO24/EECS GPIO0/SPDIF GPIO1/LDRQ1# GPIO2/THERM# GPIO3/EXTSMI# GPIO4/CLKRUN#C603 +3VS 15PC598 20P3CPU_GHI#CPU_GHI#R4560E13 Z Z1906 B15Modify 26PSON#R4664.7KT27PWROK R560 1K AUXOK AUXOK C569C606 0.1u0.1uB3 5BGPIO10/AC_SDIN3 GPIO11/OSC25M/STP_PCI# GPIO12/CPUSTP# GPIO13/DPRSLPVR GPIO14/AGPSTOP#/S3AUXSW#GPIO5/PREQ5# GPIO6/PGNT5# GPIO7/GPWAKE# G